[llvm-commits] CVS: llvm/utils/TableGen/CodeGenTarget.cpp InstrInfoEmitter.cpp

[Chris Lattner]

Changes in directory llvm/utils/TableGen:

CodeGenTarget.cpp updated: 1.76 -> 1.77
InstrInfoEmitter.cpp updated: 1.51 -> 1.52
---
Log message:

allow ptr_rc to explicitly appear in an instructions operand list, it doesn't
have to be a subpart of a complex operand.


---
Diffs of the changes:  (+42 -38)

 CodeGenTarget.cpp    |    3 +
 InstrInfoEmitter.cpp |   77 ++++++++++++++++++++++++++-------------------------
 2 files changed, 42 insertions(+), 38 deletions(-)


Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.76 llvm/utils/TableGen/CodeGenTarget.cpp:1.77
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.76	Mon Nov  6 19:27:55 2006
+++ llvm/utils/TableGen/CodeGenTarget.cpp	Thu Nov  9 20:01:40 2006
@@ -386,7 +386,8 @@
     } else if (Rec->getName() == "variable_ops") {
       hasVariableNumberOfOperands = true;
       continue;
-    } else if (!Rec->isSubClassOf("RegisterClass"))
+    } else if (!Rec->isSubClassOf("RegisterClass") && 
+               Rec->getName() != "ptr_rc")
       throw "Unknown operand class '" + Rec->getName() +
             "' in instruction '" + R->getName() + "' instruction!";
 


Index: llvm/utils/TableGen/InstrInfoEmitter.cpp
diff -u llvm/utils/TableGen/InstrInfoEmitter.cpp:1.51 llvm/utils/TableGen/InstrInfoEmitter.cpp:1.52
--- llvm/utils/TableGen/InstrInfoEmitter.cpp:1.51	Wed Nov  8 20:21:31 2006
+++ llvm/utils/TableGen/InstrInfoEmitter.cpp	Thu Nov  9 20:01:40 2006
@@ -66,50 +66,53 @@
 std::vector<std::string>
 InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
   std::vector<std::string> Result;
+  
   for (unsigned i = 0, e = Inst.OperandList.size(); i != e; ++i) {
-    if (Inst.OperandList[i].Rec->isSubClassOf("RegisterClass")) {
-      std::string OpStr = getQualifiedName(Inst.OperandList[i].Rec);
-      OpStr += "RegClassID, 0, ";
-      OpStr += Inst.OperandList[i].Constraint;
-
-      Result.push_back(OpStr);
+    // Handle aggregate operands and normal operands the same way by expanding
+    // either case into a list of operands for this op.
+    std::vector<CodeGenInstruction::OperandInfo> OperandList;
+
+    // This might be a multiple operand thing.  Targets like X86 have
+    // registers in their multi-operand operands.  It may also be an anonymous
+    // operand, which has a single operand, but no declared class for the
+    // operand.
+    DagInit *MIOI = Inst.OperandList[i].MIOperandInfo;
+    
+    if (!MIOI || MIOI->getNumArgs() == 0) {
+      // Single, anonymous, operand.
+      OperandList.push_back(Inst.OperandList[i]);
     } else {
-      // This might be a multiple operand thing.  Targets like X86 have
-      // registers in their multi-operand operands.  It may also be an anonymous
-      // operand, which has a single operand, but no declared class for the
-      // operand.
-      DagInit *MIOI = Inst.OperandList[i].MIOperandInfo;
-      
       for (unsigned j = 0, e = Inst.OperandList[i].MINumOperands; j != e; ++j) {
-        Record *OpR = 0;
-        if (MIOI && j < MIOI->getNumArgs())
-          if (DefInit *Def = dynamic_cast<DefInit*>(MIOI->getArg(j)))
-            OpR = Def->getDef();
+        OperandList.push_back(Inst.OperandList[i]);
 
-        
-        std::string Res;
-
-        if (OpR && OpR->isSubClassOf("RegisterClass"))
-          Res += getQualifiedName(OpR) + "RegClassID, ";
-        else
-          Res += "0, ";
+        Record *OpR = dynamic_cast<DefInit*>(MIOI->getArg(j))->getDef();
+        OperandList.back().Rec = OpR;
+      }
+    }
 
-        // Fill in applicable flags.
-        Res += "0";
-        
-        // Ptr value whose register class is resolved via callback.
-        if (OpR && OpR->getName() == "ptr_rc")
-          Res += "|M_LOOK_UP_PTR_REG_CLASS";
-
-        // Predicate operands.
-        if (j == 0 && Inst.OperandList[i].Rec->isSubClassOf("PredicateOperand"))
-          Res += "|M_PREDICATE_OPERAND";
+    for (unsigned j = 0, e = OperandList.size(); j != e; ++j) {
+      Record *OpR = OperandList[j].Rec;
+      std::string Res;
+      
+      if (OpR->isSubClassOf("RegisterClass"))
+        Res += getQualifiedName(OpR) + "RegClassID, ";
+      else
+        Res += "0, ";
+      // Fill in applicable flags.
+      Res += "0";
         
-        // fill in constraint info.
-        Res += ", " + Inst.OperandList[i].Constraint;
+      // Ptr value whose register class is resolved via callback.
+      if (OpR->getName() == "ptr_rc")
+        Res += "|M_LOOK_UP_PTR_REG_CLASS";
+
+      // Predicate operands.  Check to see if the original unexpanded operand
+      // was of type PredicateOperand.
+      if (j == 0 && Inst.OperandList[i].Rec->isSubClassOf("PredicateOperand"))
+        Res += "|M_PREDICATE_OPERAND";
         
-        Result.push_back(Res);
-      }
+      // Fill in constraint info.
+      Res += ", " + Inst.OperandList[i].Constraint;
+      Result.push_back(Res);
     }
   }