[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h SelectionDAGNodes.h
Evan Cheng
evan.cheng at apple.com
Thu Nov 9 09:53:15 PST 2006
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAG.h updated: 1.144 -> 1.145
SelectionDAGNodes.h updated: 1.161 -> 1.162
---
Log message:
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
---
Diffs of the changes: (+14 -13)
SelectionDAG.h | 4 ++--
SelectionDAGNodes.h | 23 ++++++++++++-----------
2 files changed, 14 insertions(+), 13 deletions(-)
Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.144 llvm/include/llvm/CodeGen/SelectionDAG.h:1.145
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.144 Sun Nov 5 13:31:28 2006
+++ llvm/include/llvm/CodeGen/SelectionDAG.h Thu Nov 9 11:53:01 2006
@@ -316,7 +316,7 @@
SDOperand Chain, SDOperand Ptr, const Value *SV,
int SVOffset, MVT::ValueType EVT, bool isVolatile=false);
SDOperand getIndexedLoad(SDOperand OrigLoad, SDOperand Base,
- SDOperand Offset, ISD::MemOpAddrMode AM);
+ SDOperand Offset, ISD::MemIndexedMode AM);
SDOperand getVecLoad(unsigned Count, MVT::ValueType VT, SDOperand Chain,
SDOperand Ptr, SDOperand SV);
@@ -328,7 +328,7 @@
const Value *SV, int SVOffset, MVT::ValueType TVT,
bool isVolatile=false);
SDOperand getIndexedStore(SDOperand OrigStoe, SDOperand Base,
- SDOperand Offset, ISD::MemOpAddrMode AM);
+ SDOperand Offset, ISD::MemIndexedMode AM);
// getSrcValue - construct a node to track a Value* through the backend
SDOperand getSrcValue(const Value* I, int offset = 0);
Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.161 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.162
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.161 Fri Nov 3 01:29:55 2006
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Thu Nov 9 11:53:01 2006
@@ -524,8 +524,8 @@
bool isBuildVectorAllZeros(const SDNode *N);
//===--------------------------------------------------------------------===//
- /// MemOpAddrMode enum - This enum defines the three load / store addressing
- /// modes.
+ /// MemIndexedMode enum - This enum defines the load / store indexed
+ /// addressing modes.
///
/// UNINDEXED "Normal" load / store. The effective address is already
/// computed and is available in the base pointer. The offset
@@ -552,12 +552,13 @@
/// computation); a post-indexed store produces one value (the
/// the result of the base +/- offset computation).
///
- enum MemOpAddrMode {
+ enum MemIndexedMode {
UNINDEXED = 0,
PRE_INC,
PRE_DEC,
POST_INC,
- POST_DEC
+ POST_DEC,
+ LAST_INDEXED_MODE
};
//===--------------------------------------------------------------------===//
@@ -865,7 +866,7 @@
/// getOperationName - Return the opcode of this operation for printing.
///
const char* getOperationName(const SelectionDAG *G = 0) const;
- static const char* getAddressingModeName(ISD::MemOpAddrMode AM);
+ static const char* getIndexedModeName(ISD::MemIndexedMode AM);
void dump() const;
void dump(const SelectionDAG *G) const;
@@ -1383,7 +1384,7 @@
///
class LoadSDNode : public SDNode {
// AddrMode - unindexed, pre-indexed, post-indexed.
- ISD::MemOpAddrMode AddrMode;
+ ISD::MemIndexedMode AddrMode;
// ExtType - non-ext, anyext, sext, zext.
ISD::LoadExtType ExtType;
@@ -1405,7 +1406,7 @@
protected:
friend class SelectionDAG;
LoadSDNode(SDOperand Chain, SDOperand Ptr, SDOperand Off,
- ISD::MemOpAddrMode AM, ISD::LoadExtType ETy, MVT::ValueType LVT,
+ ISD::MemIndexedMode AM, ISD::LoadExtType ETy, MVT::ValueType LVT,
const Value *SV, int O=0, unsigned Align=1, bool Vol=false)
: SDNode(ISD::LOAD, Chain, Ptr, Off),
AddrMode(AM), ExtType(ETy), LoadedVT(LVT), SrcValue(SV), SVOffset(O),
@@ -1418,7 +1419,7 @@
const SDOperand getChain() const { return getOperand(0); }
const SDOperand getBasePtr() const { return getOperand(1); }
const SDOperand getOffset() const { return getOperand(2); }
- ISD::MemOpAddrMode getAddressingMode() const { return AddrMode; }
+ ISD::MemIndexedMode getAddressingMode() const { return AddrMode; }
ISD::LoadExtType getExtensionType() const { return ExtType; }
MVT::ValueType getLoadedVT() const { return LoadedVT; }
const Value *getSrcValue() const { return SrcValue; }
@@ -1436,7 +1437,7 @@
///
class StoreSDNode : public SDNode {
// AddrMode - unindexed, pre-indexed, post-indexed.
- ISD::MemOpAddrMode AddrMode;
+ ISD::MemIndexedMode AddrMode;
// IsTruncStore - True is the op does a truncation before store.
bool IsTruncStore;
@@ -1458,7 +1459,7 @@
protected:
friend class SelectionDAG;
StoreSDNode(SDOperand Chain, SDOperand Value, SDOperand Ptr, SDOperand Off,
- ISD::MemOpAddrMode AM, bool isTrunc, MVT::ValueType SVT,
+ ISD::MemIndexedMode AM, bool isTrunc, MVT::ValueType SVT,
const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
: SDNode(ISD::STORE, Chain, Value, Ptr, Off),
AddrMode(AM), IsTruncStore(isTrunc), StoredVT(SVT), SrcValue(SV),
@@ -1472,7 +1473,7 @@
const SDOperand getValue() const { return getOperand(1); }
const SDOperand getBasePtr() const { return getOperand(2); }
const SDOperand getOffset() const { return getOperand(3); }
- ISD::MemOpAddrMode getAddressingMode() const { return AddrMode; }
+ ISD::MemIndexedMode getAddressingMode() const { return AddrMode; }
bool isTruncatingStore() const { return IsTruncStore; }
MVT::ValueType getStoredVT() const { return StoredVT; }
const Value *getSrcValue() const { return SrcValue; }
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