[llvm-commits] CVS: llvm/lib/Transforms/ExprTypeConvert.cpp

[Reid Spencer]

Changes in directory llvm/lib/Transforms:

ExprTypeConvert.cpp updated: 1.111 -> 1.112
---
Log message:

For PR950: http://llvm.org/PR950 :
This patch converts the old SHR instruction into two instructions, 
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.


---
Diffs of the changes:  (+11 -6)

 ExprTypeConvert.cpp |   17 +++++++++++------
 1 files changed, 11 insertions(+), 6 deletions(-)


Index: llvm/lib/Transforms/ExprTypeConvert.cpp
diff -u llvm/lib/Transforms/ExprTypeConvert.cpp:1.111 llvm/lib/Transforms/ExprTypeConvert.cpp:1.112
--- llvm/lib/Transforms/ExprTypeConvert.cpp:1.111	Thu Nov  2 14:25:50 2006
+++ llvm/lib/Transforms/ExprTypeConvert.cpp	Wed Nov  8 00:47:33 2006
@@ -76,10 +76,12 @@
         !ExpressionConvertibleToType(I->getOperand(1), Ty, CTMap, TD))
       return false;
     break;
-  case Instruction::Shr:
+  case Instruction::LShr:
+  case Instruction::AShr:
     if (!Ty->isInteger()) return false;
-    if (Ty->isSigned() != V->getType()->isSigned()) return false;
-    // FALL THROUGH
+    if (!ExpressionConvertibleToType(I->getOperand(0), Ty, CTMap, TD))
+      return false;
+    break;
   case Instruction::Shl:
     if (!Ty->isInteger()) return false;
     if (!ExpressionConvertibleToType(I->getOperand(0), Ty, CTMap, TD))
@@ -243,7 +245,8 @@
     break;
 
   case Instruction::Shl:
-  case Instruction::Shr:
+  case Instruction::LShr:
+  case Instruction::AShr:
     Res = new ShiftInst(cast<ShiftInst>(I)->getOpcode(), Dummy,
                         I->getOperand(1), Name);
     VMC.ExprMap[I] = Res;
@@ -476,7 +479,8 @@
     Value *OtherOp = I->getOperand((V == I->getOperand(0)) ? 1 : 0);
     return ExpressionConvertibleToType(OtherOp, Ty, CTMap, TD);
   }
-  case Instruction::Shr:
+  case Instruction::LShr:
+  case Instruction::AShr:
     if (Ty->isSigned() != V->getType()->isSigned()) return false;
     // FALL THROUGH
   case Instruction::Shl:
@@ -746,7 +750,8 @@
     break;
   }
   case Instruction::Shl:
-  case Instruction::Shr:
+  case Instruction::LShr:
+  case Instruction::AShr:
     assert(I->getOperand(0) == OldVal);
     Res = new ShiftInst(cast<ShiftInst>(I)->getOpcode(), NewVal,
                         I->getOperand(1), Name);