[llvm-commits] CVS: llvm/lib/Target/X86/X86FloatingPoint.cpp X86ISelLowering.cpp X86IntelAsmPrinter.cpp

Reid Spencer reid at x10sys.com
Thu Nov 2 12:27:05 PST 2006



Changes in directory llvm/lib/Target/X86:

X86FloatingPoint.cpp updated: 1.54 -> 1.55
X86ISelLowering.cpp updated: 1.286 -> 1.287
X86IntelAsmPrinter.cpp updated: 1.63 -> 1.64
---
Log message:

For PR786: http://llvm.org/PR786 :
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining 
issues when they see them. All changes pass DejaGnu tests and Olden.


---
Diffs of the changes:  (+3 -9)

 X86FloatingPoint.cpp   |    1 -
 X86ISelLowering.cpp    |   10 +++-------
 X86IntelAsmPrinter.cpp |    1 -
 3 files changed, 3 insertions(+), 9 deletions(-)


Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.54 llvm/lib/Target/X86/X86FloatingPoint.cpp:1.55
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.54	Tue Sep  5 15:27:32 2006
+++ llvm/lib/Target/X86/X86FloatingPoint.cpp	Thu Nov  2 14:25:49 2006
@@ -106,7 +106,6 @@
     bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; }
     void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) {
       if (!isAtTop(RegNo)) {
-        unsigned Slot = getSlot(RegNo);
         unsigned STReg = getSTReg(RegNo);
         unsigned RegOnTop = getStackEntry(0);
 


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.286 llvm/lib/Target/X86/X86ISelLowering.cpp:1.287
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.286	Tue Oct 31 14:13:11 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Nov  2 14:25:49 2006
@@ -532,7 +532,6 @@
 SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG) {
   SDOperand Chain     = Op.getOperand(0);
   unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue();
-  bool isVarArg       = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
   bool isTailCall     = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0;
   SDOperand Callee    = Op.getOperand(4);
   MVT::ValueType RetVT= Op.Val->getValueType(0);
@@ -1031,7 +1030,6 @@
 SDOperand
 X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
   SDOperand Chain     = Op.getOperand(0);
-  unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue();
   bool isVarArg       = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
   bool isTailCall     = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0;
   SDOperand Callee    = Op.getOperand(4);
@@ -1528,8 +1526,6 @@
 SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
                                                bool isFastCall) {
   SDOperand Chain     = Op.getOperand(0);
-  unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue();
-  bool isVarArg       = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
   bool isTailCall     = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0;
   SDOperand Callee    = Op.getOperand(4);
   MVT::ValueType RetVT= Op.Val->getValueType(0);
@@ -1549,11 +1545,13 @@
     { X86::AX,  X86::DX },
     { X86::EAX, X86::EDX }
   };
+#if 0
   static const unsigned FastCallGPRArgRegs[][2] = {
     { X86::CL,  X86::DL },
     { X86::CX,  X86::DX },
     { X86::ECX, X86::EDX }
   };  
+#endif
   static const unsigned XMMArgRegs[] = {
     X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
   };
@@ -1906,7 +1904,6 @@
 SDOperand X86TargetLowering::LowerStdCallCCCallTo(SDOperand Op,
                                                   SelectionDAG &DAG) {
   SDOperand Chain     = Op.getOperand(0);
-  unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue();
   bool isVarArg       = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
   bool isTailCall     = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0;
   SDOperand Callee    = Op.getOperand(4);
@@ -2841,7 +2838,7 @@
   unsigned i = 0;
   for (; i != NumElems; ++i) {
     SDOperand Elt = N->getOperand(i);
-    if (ConstantSDNode *EltV = dyn_cast<ConstantSDNode>(Elt)) {
+    if (isa<ConstantSDNode>(Elt)) {
       ElementBase = Elt;
       break;
     }
@@ -5431,7 +5428,6 @@
 
 SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N, 
                                                DAGCombinerInfo &DCI) const {
-  TargetMachine &TM = getTargetMachine();
   SelectionDAG &DAG = DCI.DAG;
   switch (N->getOpcode()) {
   default: break;


Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.63 llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.64
--- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.63	Tue Oct 31 02:31:24 2006
+++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp	Thu Nov  2 14:25:49 2006
@@ -386,7 +386,6 @@
     
     std::string name = Mang->getValueName(I);
     Constant *C = I->getInitializer();
-    unsigned Size = TD->getTypeSize(C->getType());
     unsigned Align = TD->getPreferredAlignmentLog(I);
     bool bCustomSegment = false;
 






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