[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.285 -> 1.286
X86ISelLowering.h updated: 1.77 -> 1.78
---
Log message:

allow the address of a global to be used with the "i" constraint when in
-static mode.  This implements PR882: http://llvm.org/PR882 .


---
Diffs of the changes:  (+36 -1)

 X86ISelLowering.cpp |   30 ++++++++++++++++++++++++++++++
 X86ISelLowering.h   |    7 ++++++-
 2 files changed, 36 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.285 llvm/lib/Target/X86/X86ISelLowering.cpp:1.286
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.285	Tue Oct 31 13:42:44 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Tue Oct 31 14:13:11 2006
@@ -5466,6 +5466,36 @@
   }
 }
 
+/// isOperandValidForConstraint - Return the specified operand (possibly
+/// modified) if the specified SDOperand is valid for the specified target
+/// constraint letter, otherwise return null.
+SDOperand X86TargetLowering::
+isOperandValidForConstraint(SDOperand Op, char Constraint, SelectionDAG &DAG) {
+  switch (Constraint) {
+  default: break;
+  case 'i':
+    // Literal immediates are always ok.
+    if (isa<ConstantSDNode>(Op)) return Op;
+    
+    // If we are in non-pic codegen mode, we allow the address of a global to
+    // be used with 'i'.
+    if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op)) {
+      if (getTargetMachine().getRelocationModel() == Reloc::PIC_)
+        return SDOperand(0, 0);
+      
+      if (GA->getOpcode() != ISD::TargetGlobalAddress)
+        Op = DAG.getTargetGlobalAddress(GA->getGlobal(), GA->getValueType(0),
+                                        GA->getOffset());
+      return Op;
+    }
+    
+    // Otherwise, not valid for this mode.
+    return SDOperand(0, 0);
+  }
+  return TargetLowering::isOperandValidForConstraint(Op, Constraint, DAG);
+}
+
+
 std::vector<unsigned> X86TargetLowering::
 getRegClassForInlineAsmConstraint(const std::string &Constraint,
                                   MVT::ValueType VT) const {


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.77 llvm/lib/Target/X86/X86ISelLowering.h:1.78
--- llvm/lib/Target/X86/X86ISelLowering.h:1.77	Fri Oct 27 16:08:32 2006
+++ llvm/lib/Target/X86/X86ISelLowering.h	Tue Oct 31 14:13:11 2006
@@ -300,7 +300,12 @@
     std::vector<unsigned> 
       getRegClassForInlineAsmConstraint(const std::string &Constraint,
                                         MVT::ValueType VT) const;
-
+    /// isOperandValidForConstraint - Return the specified operand (possibly
+    /// modified) if the specified SDOperand is valid for the specified target
+    /// constraint letter, otherwise return null.
+    SDOperand isOperandValidForConstraint(SDOperand Op, char ConstraintLetter,
+                                          SelectionDAG &DAG);
+    
     /// getRegForInlineAsmConstraint - Given a physical register constraint
     /// (e.g. {edx}), return the register number and the register class for the
     /// register.  This should only be used for C_Register constraints.  On