[llvm-commits] CVS: llvm/tools/llvm2cpp/CppWriter.cpp

[Reid Spencer]

Changes in directory llvm/tools/llvm2cpp:

CppWriter.cpp updated: 1.17 -> 1.18
---
Log message:

For PR950: http://llvm.org/PR950 :
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.


---
Diffs of the changes:  (+9 -3)

 CppWriter.cpp |   12 +++++++++---
 1 files changed, 9 insertions(+), 3 deletions(-)


Index: llvm/tools/llvm2cpp/CppWriter.cpp
diff -u llvm/tools/llvm2cpp/CppWriter.cpp:1.17 llvm/tools/llvm2cpp/CppWriter.cpp:1.18
--- llvm/tools/llvm2cpp/CppWriter.cpp:1.17	Fri Oct 20 02:07:24 2006
+++ llvm/tools/llvm2cpp/CppWriter.cpp	Thu Oct 26 01:15:43 2006
@@ -773,7 +773,9 @@
         case Instruction::Add:    Out << "getAdd";  break;
         case Instruction::Sub:    Out << "getSub"; break;
         case Instruction::Mul:    Out << "getMul"; break;
-        case Instruction::Div:    Out << "getDiv"; break;
+        case Instruction::UDiv:   Out << "getUDiv"; break;
+        case Instruction::SDiv:   Out << "getSDiv"; break;
+        case Instruction::FDiv:   Out << "getFDiv"; break;
         case Instruction::Rem:    Out << "getRem"; break;
         case Instruction::And:    Out << "getAnd"; break;
         case Instruction::Or:     Out << "getOr"; break;
@@ -1021,7 +1023,9 @@
     case Instruction::Add:
     case Instruction::Sub:
     case Instruction::Mul:
-    case Instruction::Div:
+    case Instruction::UDiv:
+    case Instruction::SDiv:
+    case Instruction::FDiv:
     case Instruction::Rem:
     case Instruction::And:
     case Instruction::Or:
@@ -1033,7 +1037,9 @@
         case Instruction::Add: Out << "Instruction::Add"; break;
         case Instruction::Sub: Out << "Instruction::Sub"; break;
         case Instruction::Mul: Out << "Instruction::Mul"; break;
-        case Instruction::Div: Out << "Instruction::Div"; break;
+        case Instruction::UDiv:Out << "Instruction::UDiv"; break;
+        case Instruction::SDiv:Out << "Instruction::SDiv"; break;
+        case Instruction::FDiv:Out << "Instruction::FDiv"; break;
         case Instruction::Rem: Out << "Instruction::Rem"; break;
         case Instruction::And: Out << "Instruction::And"; break;
         case Instruction::Or:  Out << "Instruction::Or";  break;