[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.293 -> 1.294
---
Log message:

Fix phi node updating for switches lowered to linear sequences of branches.


---
Diffs of the changes:  (+13 -1)

 SelectionDAGISel.cpp |   14 +++++++++++++-
 1 files changed, 13 insertions(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.293 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.294
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.293	Sun Oct 22 17:47:10 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Sun Oct 22 18:00:53 2006
@@ -930,7 +930,7 @@
   
   // If the switch has few cases (two or less) emit a series of specific
   // tests.
-  if (0 && Cases.size() < 3) {
+  if (Cases.size() < 3) {
     // TODO: If any two of the cases has the same destination, and if one value
     // is the same as the other, but has one bit unset that the other has set,
     // use bit manipulation to do two compares at once.  For example:
@@ -3689,6 +3689,18 @@
     return;
   }
   
+  // If the switch block involved a branch to one of the actual successors, we
+  // need to update PHI nodes in that block.
+  for (unsigned i = 0, e = PHINodesToUpdate.size(); i != e; ++i) {
+    MachineInstr *PHI = PHINodesToUpdate[i].first;
+    assert(PHI->getOpcode() == TargetInstrInfo::PHI &&
+           "This is not a machine PHI node that we are updating!");
+    if (BB->isSuccessor(PHI->getParent())) {
+      PHI->addRegOperand(PHINodesToUpdate[i].second, false);
+      PHI->addMachineBasicBlockOperand(BB);
+    }
+  }
+  
   // If we generated any switch lowering information, build and codegen any
   // additional DAGs necessary.
   for (unsigned i = 0, e = SwitchCases.size(); i != e; ++i) {