[llvm-commits] [SignlessTypes] CVS: llvm/lib/Bytecode/Reader/Reader.cpp
Reid Spencer
reid at x10sys.com
Sun Oct 22 01:59:32 PDT 2006
Changes in directory llvm/lib/Bytecode/Reader:
Reader.cpp updated: 1.198.2.4 -> 1.198.2.5
---
Log message:
Implement the FDIV instruction for floating point divide.
---
Diffs of the changes: (+12 -6)
Reader.cpp | 18 ++++++++++++------
1 files changed, 12 insertions(+), 6 deletions(-)
Index: llvm/lib/Bytecode/Reader/Reader.cpp
diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.4 llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.5
--- llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.4 Sat Oct 21 03:59:42 2006
+++ llvm/lib/Bytecode/Reader/Reader.cpp Sun Oct 22 03:59:00 2006
@@ -633,8 +633,9 @@
// either udiv or sdiv based on that type. This expression selects the
// cases where the type is floating point or signed in which case we
// generated an sdiv instruction.
- if (iType == 10 || iType == 11 || // select floating point
- (iType >= 2 && iType <= 9 && iType % 2 != 0))
+ if (iType == 10 || iType == 11 )
+ Opcode = Instruction::FDiv;
+ else if (iType >= 2 && iType <= 9 && iType % 2 != 0)
Opcode = Instruction::SDiv;
else
Opcode = Instruction::UDiv;
@@ -643,8 +644,9 @@
case 11: // Rem
// As with "Div", make the signed/unsigned Rem instruction choice based
// on the type of the instruction.
- if (iType == 10 || iType == 11 || // select floating point
- (iType >= 2 && iType <= 9 && iType % 2 != 0))
+ if (iType == 10 || iType == 11)
+ Opcode = Instruction::Rem;
+ else if (iType >= 2 && iType <= 9 && iType % 2 != 0)
Opcode = Instruction::Rem;
else
Opcode = Instruction::Rem;
@@ -1620,7 +1622,9 @@
// either udiv or sdiv based on that type. This expression selects the
// cases where the type is floating point or signed in which case we
// generated an sdiv instruction.
- if (ArgVec[0]->getType()->isSigned())
+ if (ArgVec[0]->getType()->isFloatingPoint())
+ Opcode = Instruction::FDiv;
+ else if (ArgVec[0]->getType()->isSigned())
Opcode = Instruction::SDiv;
else
Opcode = Instruction::UDiv;
@@ -1629,7 +1633,9 @@
case 11: // Rem
// As with "Div", make the signed/unsigned Rem instruction choice based
// on the type of the instruction.
- if (ArgVec[0]->getType()->isSigned())
+ if (ArgVec[0]->getType()->isFloatingPoint())
+ Opcode = Instruction::Rem;
+ else if (ArgVec[0]->getType()->isSigned())
Opcode = Instruction::Rem;
else
Opcode = Instruction::Rem;
More information about the llvm-commits
mailing list