[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Evan Cheng
evan.cheng at apple.com
Sun Oct 15 23:36:14 PDT 2006
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.275 -> 1.276
---
Log message:
Avoid getting into an infinite loop when -disable-x86-shuffle-opti is specified.
---
Diffs of the changes: (+12 -8)
X86ISelLowering.cpp | 20 ++++++++++++--------
1 files changed, 12 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.275 llvm/lib/Target/X86/X86ISelLowering.cpp:1.276
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.275 Fri Oct 13 16:14:26 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Mon Oct 16 01:36:00 2006
@@ -3413,7 +3413,7 @@
// FIXME: we can do the same for v4f32 case when we know both parts of
// the lower half come from scalar_to_vector (loadf32). We should do
// that in post legalizer dag combiner with target specific hooks.
- if (MVT::isInteger(EVT) && (NonZeros & (0x3 << 2)) == 0)
+ if (!NoShuffleOpti && MVT::isInteger(EVT) && (NonZeros & (0x3 << 2)) == 0)
return V[0];
MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems);
MVT::ValueType EVT = MVT::getVectorBaseType(MaskVT);
@@ -3466,6 +3466,8 @@
unsigned NumElems = PermMask.getNumOperands();
bool V1IsUndef = V1.getOpcode() == ISD::UNDEF;
bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
+ bool V1IsSplat = false;
+ bool V2IsSplat = false;
if (isUndefShuffle(Op.Val))
return DAG.getNode(ISD::UNDEF, VT);
@@ -3492,8 +3494,8 @@
ShouldXformToMOVLP(V1.Val, V2.Val, PermMask.Val))
return CommuteVectorShuffle(Op, DAG);
- bool V1IsSplat = isSplatVector(V1.Val);
- bool V2IsSplat = isSplatVector(V2.Val);
+ V1IsSplat = isSplatVector(V1.Val);
+ V2IsSplat = isSplatVector(V2.Val);
if ((V1IsSplat || V1IsUndef) && !(V2IsSplat || V2IsUndef)) {
Op = CommuteVectorShuffle(Op, DAG);
V1 = Op.getOperand(0);
@@ -3519,12 +3521,14 @@
}
return Op;
}
+ }
- if (X86::isUNPCKL_v_undef_Mask(PermMask.Val) ||
- X86::isUNPCKLMask(PermMask.Val) ||
- X86::isUNPCKHMask(PermMask.Val))
- return Op;
+ if (X86::isUNPCKL_v_undef_Mask(PermMask.Val) ||
+ X86::isUNPCKLMask(PermMask.Val) ||
+ X86::isUNPCKHMask(PermMask.Val))
+ return Op;
+ if (!NoShuffleOpti) {
if (V2IsSplat) {
// Normalize mask so all entries that point to V2 points to its first
// element then try to match unpck{h|l} again. If match, return a
@@ -3543,7 +3547,7 @@
}
// Normalize the node to match x86 shuffle ops if needed
- if (V2.getOpcode() != ISD::UNDEF)
+ if (!NoShuffleOpti && V2.getOpcode() != ISD::UNDEF)
if (isCommutedSHUFP(PermMask.Val)) {
Op = CommuteVectorShuffle(Op, DAG);
V1 = Op.getOperand(0);
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