[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Chris Lattner
sabre at nondot.org
Wed Oct 11 15:10:13 PDT 2006
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.114 -> 1.115
---
Log message:
Fold "zero extending vector loads" now that evan added the chain manip stuff.
This compiles both tests in X86/vec_ss_load_fold.ll into:
_test1:
movss 4(%esp), %xmm0
subss LCPI1_0, %xmm0
mulss LCPI1_1, %xmm0
minss LCPI1_2, %xmm0
xorps %xmm1, %xmm1
maxss %xmm1, %xmm0
cvttss2si %xmm0, %eax
andl $65535, %eax
ret
instead of:
_test1:
movss LCPI1_0, %xmm0
movss 4(%esp), %xmm1
subss %xmm0, %xmm1
movss LCPI1_1, %xmm0
mulss %xmm0, %xmm1
movss LCPI1_2, %xmm0
minss %xmm0, %xmm1
xorps %xmm0, %xmm0
maxss %xmm0, %xmm1
cvttss2si %xmm1, %eax
andl $65535, %eax
ret
---
Diffs of the changes: (+52 -5)
X86ISelDAGToDAG.cpp | 57 +++++++++++++++++++++++++++++++++++++++++++++++-----
1 files changed, 52 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.114 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.115
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.114 Wed Oct 11 16:06:01 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Oct 11 17:09:58 2006
@@ -778,6 +778,16 @@
return true;
}
+/// isZeroNode - Returns true if Elt is a constant zero or a floating point
+/// constant +0.0.
+static inline bool isZeroNode(SDOperand Elt) {
+ return ((isa<ConstantSDNode>(Elt) &&
+ cast<ConstantSDNode>(Elt)->getValue() == 0) ||
+ (isa<ConstantFPSDNode>(Elt) &&
+ cast<ConstantFPSDNode>(Elt)->isExactlyValue(0.0)));
+}
+
+
/// SelectScalarSSELoad - Match a scalar SSE load. In particular, we want to
/// match a load whose top elements are either undef or zeros. The load flavor
/// is derived from the type of N, which is either v4f32 or v2f64.
@@ -786,19 +796,56 @@
SDOperand &Disp, SDOperand &InChain,
SDOperand &OutChain) {
if (N.getOpcode() == ISD::SCALAR_TO_VECTOR) {
- InChain = N.getOperand(0);
+ InChain = N.getOperand(0).getValue(1);
if (ISD::isNON_EXTLoad(InChain.Val)) {
LoadSDNode *LD = cast<LoadSDNode>(InChain);
- SDOperand LoadAddr = LD->getBasePtr();
- if (!SelectAddr(LoadAddr, Base, Scale, Index, Disp))
+ if (!SelectAddr(LD->getBasePtr(), Base, Scale, Index, Disp))
return false;
OutChain = LD->getChain();
return true;
}
}
- // TODO: Also handle the case where we explicitly require zeros in the top
+
+ // Also handle the case where we explicitly require zeros in the top
// elements. This is a vector shuffle from the zero vector.
-
+ if (N.getOpcode() == ISD::VECTOR_SHUFFLE && N.Val->hasOneUse() &&
+ N.getOperand(0).getOpcode() == ISD::BUILD_VECTOR &&
+ N.getOperand(1).getOpcode() == ISD::SCALAR_TO_VECTOR &&
+ N.getOperand(1).Val->hasOneUse() &&
+ ISD::isNON_EXTLoad(N.getOperand(1).getOperand(0).Val) &&
+ N.getOperand(1).getOperand(0).hasOneUse()) {
+ // Check to see if the BUILD_VECTOR is building a zero vector.
+ SDOperand BV = N.getOperand(0);
+ for (unsigned i = 0, e = BV.getNumOperands(); i != e; ++i)
+ if (!isZeroNode(BV.getOperand(i)) &&
+ BV.getOperand(i).getOpcode() != ISD::UNDEF)
+ return false; // Not a zero/undef vector.
+ // Check to see if the shuffle mask is 4/L/L/L or 2/L, where L is something
+ // from the LHS.
+ unsigned VecWidth = BV.getNumOperands();
+ SDOperand ShufMask = N.getOperand(2);
+ assert(ShufMask.getOpcode() == ISD::BUILD_VECTOR && "Invalid shuf mask!");
+ if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(ShufMask.getOperand(0))) {
+ if (C->getValue() == VecWidth) {
+ for (unsigned i = 1; i != VecWidth; ++i) {
+ if (ShufMask.getOperand(i).getOpcode() == ISD::UNDEF) {
+ // ok.
+ } else {
+ ConstantSDNode *C = cast<ConstantSDNode>(ShufMask.getOperand(i));
+ if (C->getValue() >= VecWidth) return false;
+ }
+ }
+ }
+
+ // Okay, this is a zero extending load. Fold it.
+ LoadSDNode *LD = cast<LoadSDNode>(N.getOperand(1).getOperand(0));
+ if (!SelectAddr(LD->getBasePtr(), Base, Scale, Index, Disp))
+ return false;
+ OutChain = LD->getChain();
+ InChain = SDOperand(LD, 1);
+ return true;
+ }
+ }
return false;
}
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