[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp IA64ISelLowering.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.55 -> 1.56
IA64ISelLowering.cpp updated: 1.45 -> 1.46
---
Log message:

Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.


---
Diffs of the changes:  (+10 -10)

 IA64ISelDAGToDAG.cpp |   11 +++++------
 IA64ISelLowering.cpp |    9 +++++----
 2 files changed, 10 insertions(+), 10 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.55 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.56
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.55	Tue Oct  3 19:55:13 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Mon Oct  9 15:57:24 2006
@@ -453,15 +453,14 @@
  }
 */
 
-  case ISD::LOAD:
-  case ISD::LOADX: { // FIXME: load -1, not 1, for bools?
-    SDOperand Chain = N->getOperand(0);
-    SDOperand Address = N->getOperand(1);
+  case ISD::LOAD: { // FIXME: load -1, not 1, for bools?
+    LoadSDNode *LD = cast<LoadSDNode>(N);
+    SDOperand Chain = LD->getChain();
+    SDOperand Address = LD->getBasePtr();
     AddToISelQueue(Chain);
     AddToISelQueue(Address);
 
-    MVT::ValueType TypeBeingLoaded = (N->getOpcode() == ISD::LOAD) ?
-      N->getValueType(0) : cast<VTSDNode>(N->getOperand(3))->getVT();
+    MVT::ValueType TypeBeingLoaded = LD->getLoadVT();
     unsigned Opc;
     switch (TypeBeingLoaded) {
     default:


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.45 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.46
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.45	Thu Oct  5 18:00:04 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Mon Oct  9 15:57:25 2006
@@ -133,7 +133,7 @@
 static bool isFloatingPointZero(SDOperand Op) {
   if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op))
     return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0);
-  else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) {
+  else if (ISD::isEXTLoad(Op.Val) || ISD::isNON_EXTLoad(Op.Val)) {
     // Maybe this has already been legalized into the constant pool?
     if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
       if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal()))
@@ -226,7 +226,7 @@
         //from this parameter
         SDOperand FIN = DAG.getFrameIndex(FI, MVT::i64);
         argt = newroot = DAG.getLoad(getValueType(I->getType()),
-                                     DAG.getEntryNode(), FIN, DAG.getSrcValue(NULL));
+                                     DAG.getEntryNode(), FIN, NULL, 0);
       }
       ++count;
       DAG.setRoot(newroot.getValue(1));
@@ -583,8 +583,9 @@
   }
   case ISD::VAARG: {
     MVT::ValueType VT = getPointerTy();
+    SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
     SDOperand VAList = DAG.getLoad(VT, Op.getOperand(0), Op.getOperand(1), 
-                                   Op.getOperand(2));
+                                   SV->getValue(), SV->getOffset());
     // Increment the pointer, VAList, to the next vaarg
     SDOperand VAIncr = DAG.getNode(ISD::ADD, VT, VAList, 
                                    DAG.getConstant(MVT::getSizeInBits(VT)/8, 
@@ -593,7 +594,7 @@
     VAIncr = DAG.getStore(VAList.getValue(1), VAIncr,
                           Op.getOperand(1), Op.getOperand(2));
     // Load the actual argument out of the pointer VAList
-    return DAG.getLoad(Op.getValueType(), VAIncr, VAList, DAG.getSrcValue(0));
+    return DAG.getLoad(Op.getValueType(), VAIncr, VAList, NULL, 0);
   }
   case ISD::VASTART: {
     // vastart just stores the address of the VarArgsFrameIndex slot into the