[llvm-commits] CVS: llvm/lib/Target/ARM/ARM.h ARMISelDAGToDAG.cpp

[Rafael Espindola]

Changes in directory llvm/lib/Target/ARM:

ARM.h updated: 1.3 -> 1.4
ARMISelDAGToDAG.cpp updated: 1.38 -> 1.39
---
Log message:

add more condition codes


---
Diffs of the changes:  (+30 -2)

 ARM.h               |   30 ++++++++++++++++++++++++++++--
 ARMISelDAGToDAG.cpp |    2 ++
 2 files changed, 30 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/ARM/ARM.h
diff -u llvm/lib/Target/ARM/ARM.h:1.3 llvm/lib/Target/ARM/ARM.h:1.4
--- llvm/lib/Target/ARM/ARM.h:1.3	Thu Aug 24 12:19:08 2006
+++ llvm/lib/Target/ARM/ARM.h	Sat Sep  2 15:24:25 2006
@@ -23,16 +23,42 @@
   // Enums corresponding to ARM condition codes
   namespace ARMCC {
     enum CondCodes {
+      EQ,
       NE,
-      EQ
+      CS,
+      CC,
+      MI,
+      PL,
+      VS,
+      VC,
+      HI,
+      LS,
+      GE,
+      LT,
+      GT,
+      LE,
+      AL
     };
   }
 
   static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
     switch (CC) {
     default: assert(0 && "Unknown condition code");
-    case ARMCC::NE:  return "ne";
     case ARMCC::EQ:  return "eq";
+    case ARMCC::NE:  return "ne";
+    case ARMCC::CS:  return "cs";
+    case ARMCC::CC:  return "cc";
+    case ARMCC::MI:  return "mi";
+    case ARMCC::PL:  return "pl";
+    case ARMCC::VS:  return "vs";
+    case ARMCC::VC:  return "vc";
+    case ARMCC::HI:  return "hi";
+    case ARMCC::LS:  return "ls";
+    case ARMCC::GE:  return "ge";
+    case ARMCC::LT:  return "lt";
+    case ARMCC::GT:  return "gt";
+    case ARMCC::LE:  return "le";
+    case ARMCC::AL:  return "al";
     }
   }
 


Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.38 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.39
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.38	Sat Aug 26 00:32:46 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp	Sat Sep  2 15:24:25 2006
@@ -89,6 +89,8 @@
   default: assert(0 && "Unknown condition code!");
   case ISD::SETNE:  return ARMCC::NE;
   case ISD::SETEQ:  return ARMCC::EQ;
+  case ISD::SETGE:  return ARMCC::GE;
+  case ISD::SETUGE: return ARMCC::CS;
   }
 }