[llvm-commits] CVS: llvm/lib/Target/X86/X86.h X86ISelDAGToDAG.cpp X86TargetMachine.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/X86:

X86.h updated: 1.46 -> 1.47
X86ISelDAGToDAG.cpp updated: 1.100 -> 1.101
X86TargetMachine.cpp updated: 1.121 -> 1.122
---
Log message:

- Enable x86 isel preprocessing by default unless -fast is specified.
- Also disable isel load folding if -fast.


---
Diffs of the changes:  (+13 -8)

 X86.h                |    2 +-
 X86ISelDAGToDAG.cpp  |   15 ++++++++++-----
 X86TargetMachine.cpp |    4 ++--
 3 files changed, 13 insertions(+), 8 deletions(-)


Index: llvm/lib/Target/X86/X86.h
diff -u llvm/lib/Target/X86/X86.h:1.46 llvm/lib/Target/X86/X86.h:1.47
--- llvm/lib/Target/X86/X86.h:1.46	Tue Jul 25 15:40:54 2006
+++ llvm/lib/Target/X86/X86.h	Tue Aug 29 13:28:33 2006
@@ -28,7 +28,7 @@
 /// createX86ISelDag - This pass converts a legalized DAG into a 
 /// X86-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *createX86ISelDag(X86TargetMachine &TM);
+FunctionPass *createX86ISelDag(X86TargetMachine &TM, bool Fast);
 
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.100 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.101
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.100	Tue Aug 29 01:44:17 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Tue Aug 29 13:28:33 2006
@@ -92,6 +92,10 @@
     /// register should set this to true.
     bool ContainsFPCode;
 
+    /// FastISel - Enable fast(er) instruction selection.
+    ///
+    bool FastISel;
+
     /// X86Lowering - This object fully describes how to lower LLVM code to an
     /// X86-specific SelectionDAG.
     X86TargetLowering X86Lowering;
@@ -103,8 +107,9 @@
     unsigned GlobalBaseReg;
 
   public:
-    X86DAGToDAGISel(X86TargetMachine &TM)
+    X86DAGToDAGISel(X86TargetMachine &TM, bool fast)
       : SelectionDAGISel(X86Lowering),
+        ContainsFPCode(false), FastISel(fast), 
         X86Lowering(*TM.getTargetLowering()),
         Subtarget(&TM.getSubtarget<X86Subtarget>()) {}
 
@@ -237,7 +242,7 @@
   //      /        [X]
   //      |         ^
   //     [U]--------|
-  return !isNonImmUse(U, N);
+  return !FastISel && !isNonImmUse(U, N);
 }
 
 /// MoveBelowTokenFactor - Replace TokenFactor operand with load's chain operand
@@ -370,7 +375,7 @@
   DEBUG(BB->dump());
   MachineFunction::iterator FirstMBB = BB;
 
-  if (X86ISelPreproc)
+  if (!FastISel)
     InstructionSelectPreprocess(DAG);
 
   // Codegen the basic block.
@@ -1071,6 +1076,6 @@
 /// createX86ISelDag - This pass converts a legalized DAG into a 
 /// X86-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM) {
-  return new X86DAGToDAGISel(TM);
+FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, bool Fast) {
+  return new X86DAGToDAGISel(TM, Fast);
 }


Index: llvm/lib/Target/X86/X86TargetMachine.cpp
diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.121 llvm/lib/Target/X86/X86TargetMachine.cpp:1.122
--- llvm/lib/Target/X86/X86TargetMachine.cpp:1.121	Wed Aug 23 16:08:52 2006
+++ llvm/lib/Target/X86/X86TargetMachine.cpp	Tue Aug 29 13:28:33 2006
@@ -103,7 +103,7 @@
   PM.add(createUnreachableBlockEliminationPass());
 
   // Install an instruction selector.
-  PM.add(createX86ISelDag(*this));
+  PM.add(createX86ISelDag(*this, Fast));
 
   // Print the instruction selected machine code...
   if (PrintMachineCode)
@@ -168,7 +168,7 @@
   PM.add(createUnreachableBlockEliminationPass());
 
   // Install an instruction selector.
-  PM.add(createX86ISelDag(TM));
+  PM.add(createX86ISelDag(TM, false));
 
   // Print the instruction selected machine code...
   if (PrintMachineCode)