[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.99 -> 1.100
---
Log message:

Avoid making unneeded load/mod/store transformation which can hurt performance.

---
Diffs of the changes:  (+10 -5)

 X86ISelDAGToDAG.cpp |   15 ++++++++++-----
 1 files changed, 10 insertions(+), 5 deletions(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.99 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.100
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.99	Mon Aug 28 15:10:17 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Tue Aug 29 01:44:17 2006
@@ -80,6 +80,9 @@
   Statistic<>
   NumFPKill("x86-codegen", "Number of FP_REG_KILL instructions added");
 
+  Statistic<>
+  NumLoadMoved("x86-codegen", "Number of loads moved below TokenFactor");
+
   //===--------------------------------------------------------------------===//
   /// ISel - X86 specific code to select X86 machine instructions for
   /// SelectionDAG operations.
@@ -313,8 +316,6 @@
     switch (Opcode) {
       case ISD::ADD:
       case ISD::MUL:
-      case ISD::FADD:
-      case ISD::FMUL:
       case ISD::AND:
       case ISD::OR:
       case ISD::XOR:
@@ -329,7 +330,8 @@
           std::swap(N10, N11);
         }
         RModW = RModW && N10.Val->isOperand(Chain.Val) && N10.hasOneUse() &&
-          N10.getOperand(1) == N2;
+          (N10.getOperand(1) == N2) &&
+          (N10.Val->getValueType(0) == N1.getValueType());
         if (RModW)
           Load = N10;
         break;
@@ -347,15 +349,18 @@
         SDOperand N10 = N1.getOperand(0);
         if (N10.Val->getOpcode() == ISD::LOAD)
           RModW = N10.Val->isOperand(Chain.Val) && N10.hasOneUse() &&
-            N10.getOperand(1) == N2;
+            (N10.getOperand(1) == N2) &&
+            (N10.Val->getValueType(0) == N1.getValueType());
         if (RModW)
           Load = N10;
         break;
       }
     }
 
-    if (RModW)
+    if (RModW) {
       MoveBelowTokenFactor(DAG, Load, SDOperand(I, 0), Chain);
+      ++NumLoadMoved;
+    }
   }
 }