[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp

[Rafael Espindola]

Changes in directory llvm/lib/Target/ARM:

ARMISelDAGToDAG.cpp updated: 1.31 -> 1.32
---
Log message:

call computeRegisterProperties


---
Diffs of the changes:  (+6 -0)

 ARMISelDAGToDAG.cpp |    6 ++++++
 1 files changed, 6 insertions(+)


Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.31 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.32
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.31	Thu Aug 17 12:09:40 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp	Sat Aug 19 20:49:49 2006
@@ -42,11 +42,17 @@
 
 ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
   : TargetLowering(TM) {
+  addRegisterClass(MVT::i32, ARM::IntRegsRegisterClass);
+
+  //LLVM requires that a register class supports MVT::f64!
+  addRegisterClass(MVT::f64, ARM::IntRegsRegisterClass);
+
   setOperationAction(ISD::RET,           MVT::Other, Custom);
   setOperationAction(ISD::GlobalAddress, MVT::i32,   Custom);
   setOperationAction(ISD::ConstantPool,  MVT::i32,   Custom);
 
   setSchedulingPreference(SchedulingForRegPressure);
+  computeRegisterProperties();
 }
 
 namespace llvm {