[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp LegalizeDAG.cpp
Chris Lattner
lattner at cs.uiuc.edu
Mon Aug 14 16:53:50 PDT 2006
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.268 -> 1.269
LegalizeDAG.cpp updated: 1.386 -> 1.387
---
Log message:
eliminate use of getNode that takes vector of valuetypes.
---
Diffs of the changes: (+30 -30)
LegalizeDAG.cpp | 17 ++++++++---------
SelectionDAGISel.cpp | 43 ++++++++++++++++++++++---------------------
2 files changed, 30 insertions(+), 30 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.268 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.269
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.268 Mon Aug 7 21:23:41 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Aug 14 18:53:35 2006
@@ -1346,11 +1346,10 @@
getIntPtrConstant(~(uint64_t)(StackAlign-1)));
}
- std::vector<MVT::ValueType> VTs;
- VTs.push_back(AllocSize.getValueType());
- VTs.push_back(MVT::Other);
SDOperand Ops[] = { getRoot(), AllocSize, getIntPtrConstant(Align) };
- SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, Ops, 3);
+ const MVT::ValueType *VTs = DAG.getNodeValueTypes(AllocSize.getValueType(),
+ MVT::Other);
+ SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, 2, Ops, 3);
DAG.setRoot(setValue(&I, DSA).getValue(1));
// Inform the Frame Information that we have just allocated a variable-sized
@@ -1476,14 +1475,19 @@
if (HasChain)
VTs.push_back(MVT::Other);
+ const MVT::ValueType *VTList = DAG.getNodeValueTypes(VTs);
+
// Create the node.
SDOperand Result;
if (!HasChain)
- Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, VTs, &Ops[0], Ops.size());
+ Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, VTList, VTs.size(),
+ &Ops[0], Ops.size());
else if (I.getType() != Type::VoidTy)
- Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, VTs, &Ops[0], Ops.size());
+ Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, VTList, VTs.size(),
+ &Ops[0], Ops.size());
else
- Result = DAG.getNode(ISD::INTRINSIC_VOID, VTs, &Ops[0], Ops.size());
+ Result = DAG.getNode(ISD::INTRINSIC_VOID, VTList, VTs.size(),
+ &Ops[0], Ops.size());
if (HasChain) {
SDOperand Chain = Result.getValue(Result.Val->getNumValues()-1);
@@ -1623,11 +1627,10 @@
return 0;
}
case Intrinsic::readcyclecounter: {
- std::vector<MVT::ValueType> VTs;
- VTs.push_back(MVT::i64);
- VTs.push_back(MVT::Other);
SDOperand Op = getRoot();
- SDOperand Tmp = DAG.getNode(ISD::READCYCLECOUNTER, VTs, &Op, 1);
+ SDOperand Tmp = DAG.getNode(ISD::READCYCLECOUNTER,
+ DAG.getNodeValueTypes(MVT::i64, MVT::Other), 2,
+ &Op, 1);
setValue(&I, Tmp);
DAG.setRoot(Tmp.getValue(1));
return 0;
@@ -1664,11 +1667,9 @@
getValue(I.getOperand(1))));
return 0;
case Intrinsic::stacksave: {
- std::vector<MVT::ValueType> VTs;
- VTs.push_back(TLI.getPointerTy());
- VTs.push_back(MVT::Other);
SDOperand Op = getRoot();
- SDOperand Tmp = DAG.getNode(ISD::STACKSAVE, VTs, &Op, 1);
+ SDOperand Tmp = DAG.getNode(ISD::STACKSAVE,
+ DAG.getNodeValueTypes(TLI.getPointerTy(), MVT::Other), 2, &Op, 1);
setValue(&I, Tmp);
DAG.setRoot(Tmp.getValue(1));
return 0;
@@ -2256,10 +2257,8 @@
AsmNodeOperands[0] = Chain;
if (Flag.Val) AsmNodeOperands.push_back(Flag);
- std::vector<MVT::ValueType> VTs;
- VTs.push_back(MVT::Other);
- VTs.push_back(MVT::Flag);
- Chain = DAG.getNode(ISD::INLINEASM, VTs,
+ Chain = DAG.getNode(ISD::INLINEASM,
+ DAG.getNodeValueTypes(MVT::Other, MVT::Flag), 2,
&AsmNodeOperands[0], AsmNodeOperands.size());
Flag = Chain.getValue(1);
@@ -2428,7 +2427,8 @@
RetVals.push_back(MVT::Other);
// Create the node.
- SDNode *Result = DAG.getNode(ISD::FORMAL_ARGUMENTS, RetVals,
+ SDNode *Result = DAG.getNode(ISD::FORMAL_ARGUMENTS,
+ DAG.getNodeValueTypes(RetVals), RetVals.size(),
&Ops[0], Ops.size()).Val;
DAG.setRoot(SDOperand(Result, Result->getNumValues()-1));
@@ -2636,7 +2636,8 @@
RetTys.push_back(MVT::Other); // Always has a chain.
// Finally, create the CALL node.
- SDOperand Res = DAG.getNode(ISD::CALL, RetTys, &Ops[0], Ops.size());
+ SDOperand Res = DAG.getNode(ISD::CALL, DAG.getNodeValueTypes(RetTys),
+ RetTys.size(), &Ops[0], Ops.size());
// This returns a pair of operands. The first element is the
// return value for the function (if RetTy is not VoidTy). The second
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.386 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.387
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.386 Mon Aug 7 21:23:41 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Aug 14 18:53:35 2006
@@ -3665,8 +3665,8 @@
ExpandOp(Op, LHSL, LHSH);
SDOperand Ops[] = { LHSL, LHSH, Amt };
- std::vector<MVT::ValueType> VTs(2, LHSL.getValueType());
- Lo = DAG.getNode(NodeOp, VTs, Ops, 3);
+ MVT::ValueType VT = LHSL.getValueType();
+ Lo = DAG.getNode(NodeOp, DAG.getNodeValueTypes(VT, VT), 2, Ops, 3);
Hi = Lo.getValue(1);
}
@@ -4636,22 +4636,21 @@
SDOperand LHSL, LHSH, RHSL, RHSH;
ExpandOp(Node->getOperand(0), LHSL, LHSH);
ExpandOp(Node->getOperand(1), RHSL, RHSH);
- std::vector<MVT::ValueType> VTs;
+ const MVT::ValueType *VTs =
+ DAG.getNodeValueTypes(LHSL.getValueType(),MVT::Flag);
SDOperand LoOps[2], HiOps[2];
- VTs.push_back(LHSL.getValueType());
- VTs.push_back(MVT::Flag);
LoOps[0] = LHSL;
LoOps[1] = RHSL;
HiOps[0] = LHSH;
HiOps[1] = RHSH;
if (Node->getOpcode() == ISD::ADD) {
- Lo = DAG.getNode(ISD::ADDC, VTs, LoOps, 2);
+ Lo = DAG.getNode(ISD::ADDC, VTs, 2, LoOps, 2);
HiOps[2] = Lo.getValue(1);
- Hi = DAG.getNode(ISD::ADDE, VTs, HiOps, 3);
+ Hi = DAG.getNode(ISD::ADDE, VTs, 2, HiOps, 3);
} else {
- Lo = DAG.getNode(ISD::SUBC, VTs, LoOps, 2);
+ Lo = DAG.getNode(ISD::SUBC, VTs, 2, LoOps, 2);
HiOps[2] = Lo.getValue(1);
- Hi = DAG.getNode(ISD::SUBE, VTs, HiOps, 3);
+ Hi = DAG.getNode(ISD::SUBE, VTs, 2, HiOps, 3);
}
break;
}
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