[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
Chris Lattner
lattner at cs.uiuc.edu
Fri Aug 11 10:20:08 PDT 2006
Changes in directory llvm/lib/Target/Alpha:
AlphaISelLowering.cpp updated: 1.56 -> 1.57
---
Log message:
eliminate use of getNode that takes vector<SDOperand>. Wrap a really long line.
---
Diffs of the changes: (+6 -4)
AlphaISelLowering.cpp | 10 ++++++----
1 files changed, 6 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.56 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.57
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.56 Mon Jul 3 13:00:29 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Fri Aug 11 12:19:54 2006
@@ -159,7 +159,8 @@
}
}
-//http://www.cs.arizona.edu/computer.help/policy/DIGITAL_unix/AA-PY8AC-TET1_html/callCH3.html#BLOCK21
+//http://www.cs.arizona.edu/computer.help/policy/DIGITAL_unix/
+//AA-PY8AC-TET1_html/callCH3.html#BLOCK21
//For now, just use variable size stack frame format
@@ -268,12 +269,13 @@
// Return the new list of results.
std::vector<MVT::ValueType> RetVT(Op.Val->value_begin(),
Op.Val->value_end());
- return DAG.getNode(ISD::MERGE_VALUES, RetVT, ArgValues);
+ return DAG.getNode(ISD::MERGE_VALUES, RetVT, &ArgValues[0], ArgValues.size());
}
static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG, unsigned int RA) {
SDOperand Copy = DAG.getCopyToReg(Op.getOperand(0), Alpha::R26,
- DAG.getNode(AlphaISD::GlobalRetAddr, MVT::i64),
+ DAG.getNode(AlphaISD::GlobalRetAddr,
+ MVT::i64),
SDOperand());
switch (Op.getNumOperands()) {
default:
@@ -350,7 +352,7 @@
Ops.push_back(Chain);
Ops.push_back(Callee);
Ops.insert(Ops.end(), args_to_use.begin(), args_to_use.end());
- SDOperand TheCall = DAG.getNode(AlphaISD::CALL, RetVals, Ops);
+ SDOperand TheCall = DAG.getNode(AlphaISD::CALL, RetVals, &Ops[0], Ops.size());
Chain = TheCall.getValue(RetTyVT != MVT::isVoid);
Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain,
DAG.getConstant(NumBytes, getPointerTy()));
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