[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp X86ISelLowering.cpp
Evan Cheng
evan.cheng at apple.com
Fri Aug 11 02:05:18 PDT 2006
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.90 -> 1.91
X86ISelLowering.cpp updated: 1.243 -> 1.244
---
Log message:
Match tablegen changes.
---
Diffs of the changes: (+38 -20)
X86ISelDAGToDAG.cpp | 26 ++++++++++++++------------
X86ISelLowering.cpp | 32 ++++++++++++++++++++++++--------
2 files changed, 38 insertions(+), 20 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.90 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.91
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.90 Mon Aug 7 19:31:00 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Fri Aug 11 04:05:03 2006
@@ -123,7 +123,7 @@
#include "X86GenDAGISel.inc"
private:
- void Select(SDOperand &Result, SDOperand N);
+ SDNode *Select(SDOperand &Result, SDOperand N);
bool MatchAddress(SDOperand N, X86ISelAddressMode &AM, bool isRoot = true);
bool SelectAddr(SDOperand N, SDOperand &Base, SDOperand &Scale,
@@ -646,7 +646,7 @@
return FindCallStartFromCall(Node->getOperand(0).Val);
}
-void X86DAGToDAGISel::Select(SDOperand &Result, SDOperand N) {
+SDNode *X86DAGToDAGISel::Select(SDOperand &Result, SDOperand N) {
SDNode *Node = N.Val;
MVT::ValueType NVT = Node->getValueType(0);
unsigned Opc, MOpc;
@@ -669,15 +669,14 @@
DEBUG(std::cerr << "\n");
Indent -= 2;
#endif
- return; // Already selected.
+ return NULL; // Already selected.
}
switch (Opcode) {
default: break;
case X86ISD::GlobalBaseReg:
Result = getGlobalBaseReg();
- ReplaceUses(N, Result);
- return;
+ return Result.Val;
case ISD::ADD: {
// Turn ADD X, c to MOV32ri X+c. This cannot be done with tblgen'd
@@ -705,12 +704,12 @@
if (C.Val) {
if (N.Val->hasOneUse()) {
Result = CurDAG->SelectNodeTo(N.Val, X86::MOV32ri, MVT::i32, C);
+ return NULL;
} else {
SDNode *ResNode = CurDAG->getTargetNode(X86::MOV32ri, MVT::i32, C);
Result = SDOperand(ResNode, 0);
- ReplaceUses(N, Result);
+ return ResNode;
}
- return;
}
}
@@ -798,7 +797,7 @@
DEBUG(std::cerr << "\n");
Indent -= 2;
#endif
- return;
+ return NULL;
}
case ISD::SDIV:
@@ -902,7 +901,8 @@
DEBUG(std::cerr << "\n");
Indent -= 2;
#endif
- return;
+
+ return NULL;
}
case ISD::TRUNCATE: {
@@ -927,7 +927,6 @@
AddToQueue(Tmp0, Node->getOperand(0));
Tmp1 = SDOperand(CurDAG->getTargetNode(Opc, VT, Tmp0), 0);
Result = SDOperand(CurDAG->getTargetNode(Opc2, NVT, Tmp1), 0);
- ReplaceUses(N, Result);
#ifndef NDEBUG
DEBUG(std::cerr << std::string(Indent-2, ' '));
@@ -936,14 +935,15 @@
DEBUG(std::cerr << "\n");
Indent -= 2;
#endif
- return;
+ return Result.Val;
}
break;
}
}
- SelectCode(Result, N);
+ SDNode *ResNode = SelectCode(Result, N);
+
#ifndef NDEBUG
DEBUG(std::cerr << std::string(Indent-2, ' '));
DEBUG(std::cerr << "=> ");
@@ -951,6 +951,8 @@
DEBUG(std::cerr << "\n");
Indent -= 2;
#endif
+
+ return ResNode;
}
bool X86DAGToDAGISel::
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.243 llvm/lib/Target/X86/X86ISelLowering.cpp:1.244
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.243 Fri Aug 11 02:35:45 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Aug 11 04:05:03 2006
@@ -2992,9 +2992,14 @@
}
Constant *CS = ConstantStruct::get(CV);
SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4);
- SDOperand Mask
- = DAG.getNode(X86ISD::LOAD_PACK,
- VT, DAG.getEntryNode(), CPIdx, DAG.getSrcValue(NULL));
+ std::vector<MVT::ValueType> Tys;
+ Tys.push_back(VT);
+ Tys.push_back(MVT::Other);
+ SmallVector<SDOperand, 3> Ops;
+ Ops.push_back(DAG.getEntryNode());
+ Ops.push_back(CPIdx);
+ Ops.push_back(DAG.getSrcValue(NULL));
+ SDOperand Mask = DAG.getNode(X86ISD::LOAD_PACK, Tys, &Ops[0], Ops.size());
return DAG.getNode(X86ISD::FAND, VT, Op.getOperand(0), Mask);
}
@@ -3013,8 +3018,14 @@
}
Constant *CS = ConstantStruct::get(CV);
SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4);
- SDOperand Mask = DAG.getNode(X86ISD::LOAD_PACK,
- VT, DAG.getEntryNode(), CPIdx, DAG.getSrcValue(NULL));
+ std::vector<MVT::ValueType> Tys;
+ Tys.push_back(VT);
+ Tys.push_back(MVT::Other);
+ SmallVector<SDOperand, 3> Ops;
+ Ops.push_back(DAG.getEntryNode());
+ Ops.push_back(CPIdx);
+ Ops.push_back(DAG.getSrcValue(NULL));
+ SDOperand Mask = DAG.getNode(X86ISD::LOAD_PACK, Tys, &Ops[0], Ops.size());
return DAG.getNode(X86ISD::FXOR, VT, Op.getOperand(0), Mask);
}
@@ -4121,10 +4132,15 @@
Base->getOperand(2));
else {
// Just use movups, it's shorter.
+ std::vector<MVT::ValueType> Tys;
+ Tys.push_back(MVT::v4f32);
+ Tys.push_back(MVT::Other);
+ SmallVector<SDOperand, 3> Ops;
+ Ops.push_back(Base->getOperand(0));
+ Ops.push_back(Base->getOperand(1));
+ Ops.push_back(Base->getOperand(2));
return DAG.getNode(ISD::BIT_CONVERT, VT,
- DAG.getNode(X86ISD::LOAD_UA, MVT::v4f32,
- Base->getOperand(0), Base->getOperand(1),
- Base->getOperand(2)));
+ DAG.getNode(X86ISD::LOAD_UA, Tys, &Ops[0], Ops.size()));
}
}
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