[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrInfo.cpp ARMInstrInfo.h ARMInstrInfo.td ARMRegisterInfo.cpp

[Rafael Espindola]

Changes in directory llvm/lib/Target/ARM:

ARMInstrInfo.cpp updated: 1.4 -> 1.5
ARMInstrInfo.h updated: 1.2 -> 1.3
ARMInstrInfo.td updated: 1.12 -> 1.13
ARMRegisterInfo.cpp updated: 1.10 -> 1.11
---
Log message:

change the addressing mode of the str instruction to reg+imm


---
Diffs of the changes:  (+13 -7)

 ARMInstrInfo.cpp    |    4 ++++
 ARMInstrInfo.h      |    4 ++++
 ARMInstrInfo.td     |    6 +++---
 ARMRegisterInfo.cpp |    6 ++----
 4 files changed, 13 insertions(+), 7 deletions(-)


Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp
diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.4 llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.5
--- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.4	Sun Jul  9 20:41:35 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.cpp	Tue Aug  8 15:35:03 2006
@@ -22,6 +22,10 @@
   : TargetInstrInfo(ARMInsts, sizeof(ARMInsts)/sizeof(ARMInsts[0])) {
 }
 
+const TargetRegisterClass *ARMInstrInfo::getPointerRegClass() const {
+  return &ARM::IntRegsRegClass;
+}
+
 /// Return true if the instruction is a register to register move and
 /// leave the source and dest operands in the passed parameters.
 ///


Index: llvm/lib/Target/ARM/ARMInstrInfo.h
diff -u llvm/lib/Target/ARM/ARMInstrInfo.h:1.2 llvm/lib/Target/ARM/ARMInstrInfo.h:1.3
--- llvm/lib/Target/ARM/ARMInstrInfo.h:1.2	Sun Jul  9 20:41:35 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.h	Tue Aug  8 15:35:03 2006
@@ -31,6 +31,10 @@
   ///
   virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
 
+  /// getPointerRegClass - Return the register class to use to hold pointers.
+  /// This is used for addressing modes.
+  virtual const TargetRegisterClass *getPointerRegClass() const;
+
   /// Return true if the instruction is a register to register move and
   /// leave the source and dest operands in the passed parameters.
   ///


Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.12 llvm/lib/Target/ARM/ARMInstrInfo.td:1.13
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.12	Thu Aug  3 12:02:20 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td	Tue Aug  8 15:35:03 2006
@@ -67,9 +67,9 @@
                      "ldr $dst, $addr",
                      [(set IntRegs:$dst, (load iaddr:$addr))]>;
 
-def str  : InstARM<(ops IntRegs:$src, IntRegs:$addr),
-                    "str $src, [$addr]",
-                    [(store IntRegs:$src, IntRegs:$addr)]>;
+def str  : InstARM<(ops IntRegs:$src, memri:$addr),
+                    "str $src, $addr",
+                    [(store IntRegs:$src, iaddr:$addr)]>;
 
 def movrr   : InstARM<(ops IntRegs:$dst, IntRegs:$src),
                        "mov $dst, $src", []>;


Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.10 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.11
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.10	Tue Aug  8 08:02:29 2006
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp	Tue Aug  8 15:35:03 2006
@@ -135,10 +135,8 @@
 
   //sub sp, sp, #NumBytes
   BuildMI(MBB, MBBI, ARM::subri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes);
-  //add ip, sp, #NumBytes - 4
-  BuildMI(MBB, MBBI, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(NumBytes - 4);
-  //str lr, [ip]
-  BuildMI(MBB, MBBI, ARM::str, 1, ARM::R14).addReg(ARM::R12);
+  //str lr, [sp, #NumBytes - 4]
+  BuildMI(MBB, MBBI, ARM::str, 2, ARM::R14).addImm(NumBytes - 4).addReg(ARM::R13);
 }
 
 void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,