[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Evan Cheng
evan.cheng at apple.com
Tue Jul 18 22:58:30 PDT 2006
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.77 -> 1.78
---
Log message:
Make sub- and super- register classes const.
---
Diffs of the changes: (+3 -3)
MRegisterInfo.h | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.77 llvm/include/llvm/Target/MRegisterInfo.h:1.78
--- llvm/include/llvm/Target/MRegisterInfo.h:1.77 Thu May 11 02:31:44 2006
+++ llvm/include/llvm/Target/MRegisterInfo.h Wed Jul 19 00:58:18 2006
@@ -47,7 +47,7 @@
typedef const unsigned* const_iterator;
typedef const MVT::ValueType* vt_iterator;
- typedef const TargetRegisterClass** sc_iterator;
+ typedef const TargetRegisterClass* const * sc_iterator;
private:
bool isSubClass;
const vt_iterator VTs;
@@ -57,8 +57,8 @@
const iterator RegsBegin, RegsEnd;
public:
TargetRegisterClass(const MVT::ValueType *vts,
- const TargetRegisterClass **subcs,
- const TargetRegisterClass **supcs,
+ const TargetRegisterClass * const *subcs,
+ const TargetRegisterClass * const *supcs,
unsigned RS, unsigned Al, iterator RB, iterator RE)
: VTs(vts), SubClasses(subcs), SuperClasses(supcs),
RegSize(RS), Alignment(Al), RegsBegin(RB), RegsEnd(RE) {}
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