[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp PPCInstr64Bit.td PPCInstrFormats.td

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPCAsmPrinter.cpp updated: 1.181 -> 1.182
PPCInstr64Bit.td updated: 1.15 -> 1.16
PPCInstrFormats.td updated: 1.76 -> 1.77
---
Log message:

Add a pattern for i64 sra.  Print 8-byte units with a space between the .quad 
and the data



---
Diffs of the changes:  (+7 -4)

 PPCAsmPrinter.cpp  |    2 +-
 PPCInstr64Bit.td   |    6 ++++--
 PPCInstrFormats.td |    3 ++-
 3 files changed, 7 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.181 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.182
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.181	Mon Jun 26 20:02:25 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp	Tue Jun 27 15:07:26 2006
@@ -276,7 +276,7 @@
       PrivateGlobalPrefix = "L";     // Marker for constant pool idxs
       ZeroDirective = "\t.space\t";  // ".space N" emits N zeros.
       if (isPPC64)
-        Data64bitsDirective = ".quad";       // we can't emit a 64-bit unit
+        Data64bitsDirective = ".quad\t";       // we can't emit a 64-bit unit
       else
         Data64bitsDirective = 0;       // we can't emit a 64-bit unit
       AlignmentIsInBytes = false;    // Alignment is by power of 2.


Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
diff -u llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.15 llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.16
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.15	Tue Jun 27 13:36:44 2006
+++ llvm/lib/Target/PowerPC/PPCInstr64Bit.td	Tue Jun 27 15:07:26 2006
@@ -190,8 +190,10 @@
                       "extsw $rA, $rS", IntGeneral,
                       [(set G8RC:$rA, (sext GPRC:$rS))]>, isPPC64;
 
-def SRADI  : XSForm_1<31, 413, (ops GPRC:$rA, GPRC:$rS, u6imm:$SH),
-                      "sradi $rA, $rS, $SH", IntRotateD>, isPPC64;
+def SRADI  : XSForm_1<31, 413, (ops G8RC:$rA, G8RC:$rS, u6imm:$SH),
+                      "sradi $rA, $rS, $SH", IntRotateD,
+                      [(set G8RC:$rA, (sra G8RC:$rS, (i32 imm:$SH)))]>, isPPC64;
+                      
 def DIVD  : XOForm_1<31, 489, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
                      "divd $rT, $rA, $rB", IntDivD,
                      [(set G8RC:$rT, (sdiv G8RC:$rA, G8RC:$rB))]>, isPPC64,


Index: llvm/lib/Target/PowerPC/PPCInstrFormats.td
diff -u llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.76 llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.77
--- llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.76	Tue Jun 20 18:18:58 2006
+++ llvm/lib/Target/PowerPC/PPCInstrFormats.td	Tue Jun 27 15:07:26 2006
@@ -501,13 +501,14 @@
 
 // 1.7.10 XS-Form
 class XSForm_1<bits<6> opcode, bits<9> xo, dag OL, string asmstr,
-               InstrItinClass itin>
+               InstrItinClass itin, list<dag> pattern>
          : I<opcode, OL, asmstr, itin> {
   bits<5> RS;
   bits<5> A;
   bits<6> SH;
 
   bit RC = 0;    // set by isDOT
+  let Pattern = pattern;
 
   let Inst{6-10}  = RS;
   let Inst{11-15} = A;