[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp AlphaISelLowering.cpp AlphaISelLowering.h

[Andrew Lenharth]

Changes in directory llvm/lib/Target/Alpha:

AlphaAsmPrinter.cpp updated: 1.43 -> 1.44
AlphaISelLowering.cpp updated: 1.52 -> 1.53
AlphaISelLowering.h updated: 1.18 -> 1.19
---
Log message:

inline asm, at least for floats

---
Diffs of the changes:  (+58 -0)

 AlphaAsmPrinter.cpp   |   12 ++++++++++++
 AlphaISelLowering.cpp |   39 +++++++++++++++++++++++++++++++++++++++
 AlphaISelLowering.h   |    7 +++++++
 3 files changed, 58 insertions(+)


Index: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
diff -u llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.43 llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.44
--- llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.43	Wed May 17 14:24:31 2006
+++ llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp	Wed Jun 21 08:37:27 2006
@@ -59,6 +59,9 @@
     bool runOnMachineFunction(MachineFunction &F);
     bool doInitialization(Module &M);
     bool doFinalization(Module &M);
+
+    bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+                         unsigned AsmVariant, const char *ExtraCode);
   };
 } // end of anonymous namespace
 
@@ -265,3 +268,12 @@
   AsmPrinter::doFinalization(M);
   return false;
 }
+
+/// PrintAsmOperand - Print out an operand for an inline asm expression.
+///
+bool AlphaAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+                                    unsigned AsmVariant, 
+                                    const char *ExtraCode) {
+  printOperand(MI, OpNo);
+  return false;
+}


Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.52 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.53
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.52	Tue Jun 20 20:00:43 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp	Wed Jun 21 08:37:27 2006
@@ -580,3 +580,42 @@
   // The code in LowerOperation already handles i32 vaarg
   return LowerOperation(Op, DAG);
 }
+
+
+//Inline Asm
+
+/// getConstraintType - Given a constraint letter, return the type of
+/// constraint it is for this target.
+AlphaTargetLowering::ConstraintType 
+AlphaTargetLowering::getConstraintType(char ConstraintLetter) const {
+  switch (ConstraintLetter) {
+  default: break;
+  case 'f':
+    return C_RegisterClass;
+  }  
+  return TargetLowering::getConstraintType(ConstraintLetter);
+}
+
+std::vector<unsigned> AlphaTargetLowering::
+getRegClassForInlineAsmConstraint(const std::string &Constraint,
+                                  MVT::ValueType VT) const {
+  if (Constraint.size() == 1) {
+    switch (Constraint[0]) {
+    default: break;  // Unknown constriant letter
+    case 'f': 
+      return make_vector<unsigned>(Alpha::F0 , Alpha::F1 , Alpha::F2 ,
+				   Alpha::F3 , Alpha::F4 , Alpha::F5 , 
+				   Alpha::F6 , Alpha::F7 , Alpha::F8 , 
+				   Alpha::F9 , Alpha::F10, Alpha::F11, 
+                                   Alpha::F12, Alpha::F13, Alpha::F14, 
+				   Alpha::F15, Alpha::F16, Alpha::F17, 
+				   Alpha::F18, Alpha::F19, Alpha::F20, 
+				   Alpha::F21, Alpha::F22, Alpha::F23, 
+                                   Alpha::F24, Alpha::F25, Alpha::F26, 
+				   Alpha::F27, Alpha::F28, Alpha::F29, 
+				   Alpha::F30, Alpha::F31, 0);
+    }
+  }
+  
+  return std::vector<unsigned>();
+}


Index: llvm/lib/Target/Alpha/AlphaISelLowering.h
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.h:1.18 llvm/lib/Target/Alpha/AlphaISelLowering.h:1.19
--- llvm/lib/Target/Alpha/AlphaISelLowering.h:1.18	Tue Jun 13 13:27:39 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.h	Wed Jun 21 08:37:27 2006
@@ -15,6 +15,7 @@
 #ifndef LLVM_TARGET_ALPHA_ALPHAISELLOWERING_H
 #define LLVM_TARGET_ALPHA_ALPHAISELLOWERING_H
 
+#include "llvm/ADT/VectorExtras.h"
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "Alpha.h"
@@ -77,6 +78,12 @@
                 bool isTailCall, SDOperand Callee, ArgListTy &Args,
                 SelectionDAG &DAG);
 
+    ConstraintType getConstraintType(char ConstraintLetter) const;
+
+    std::vector<unsigned> 
+      getRegClassForInlineAsmConstraint(const std::string &Constraint,
+                                        MVT::ValueType VT) const;
+
     void restoreGP(MachineBasicBlock* BB);
     void restoreRA(MachineBasicBlock* BB);
     unsigned getVRegGP() { return GP; }