[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.td updated: 1.231 -> 1.232
---
Log message:

Make these predicates correct in 64-bit mode too.


---
Diffs of the changes:  (+5 -2)

 PPCInstrInfo.td |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.231 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.232
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.231	Tue Jun 20 18:18:58 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Tue Jun 20 18:21:20 2006
@@ -122,12 +122,15 @@
 def immSExt16  : PatLeaf<(imm), [{
   // immSExt16 predicate - True if the immediate fits in a 16-bit sign extended
   // field.  Used by instructions like 'addi'.
-  return (int)N->getValue() == (short)N->getValue();
+  if (N->getValueType(0) == MVT::i32)
+    return (int32_t)N->getValue() == (short)N->getValue();
+  else
+    return (int64_t)N->getValue() == (short)N->getValue();
 }]>;
 def immZExt16  : PatLeaf<(imm), [{
   // immZExt16 predicate - True if the immediate fits in a 16-bit zero extended
   // field.  Used by instructions like 'ori'.
-  return (unsigned)N->getValue() == (unsigned short)N->getValue();
+  return (uint64_t)N->getValue() == (unsigned short)N->getValue();
 }], LO16>;
 
 // imm16Shifted* - These match immediates where the low 16-bits are zero.  There