[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAGISel.cpp
Evan Cheng
evan.cheng at apple.com
Fri May 26 16:08:27 PDT 2006
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.378 -> 1.379
SelectionDAGISel.cpp updated: 1.251 -> 1.252
---
Log message:
Change RET node to include signness information of the return values. e.g.
RET chain, value1, sign1, value2, sign2
---
Diffs of the changes: (+17 -9)
LegalizeDAG.cpp | 20 ++++++++++++--------
SelectionDAGISel.cpp | 6 +++++-
2 files changed, 17 insertions(+), 9 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.378 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.379
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.378 Wed May 24 12:04:04 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri May 26 18:08:15 2006
@@ -1453,17 +1453,18 @@
LastCALLSEQ_END = DAG.getEntryNode();
switch (Node->getNumOperands()) {
- case 2: // ret val
+ case 3: // ret val
Tmp2 = Node->getOperand(1);
+ Tmp3 = Node->getOperand(2); // Signness
switch (getTypeAction(Tmp2.getValueType())) {
case Legal:
- Result = DAG.UpdateNodeOperands(Result, Tmp1, LegalizeOp(Tmp2));
+ Result = DAG.UpdateNodeOperands(Result, Tmp1, LegalizeOp(Tmp2), Tmp3);
break;
case Expand:
if (Tmp2.getValueType() != MVT::Vector) {
SDOperand Lo, Hi;
ExpandOp(Tmp2, Lo, Hi);
- Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Hi);
+ Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi, Tmp3);
} else {
SDNode *InVal = Tmp2.Val;
unsigned NumElems =
@@ -1476,11 +1477,11 @@
if (TVT != MVT::Other && TLI.isTypeLegal(TVT)) {
// Turn this into a return of the packed type.
Tmp2 = PackVectorOp(Tmp2, TVT);
- Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2);
+ Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3);
} else if (NumElems == 1) {
// Turn this into a return of the scalar type.
Tmp2 = PackVectorOp(Tmp2, EVT);
- Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2);
+ Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3);
// FIXME: Returns of gcc generic vectors smaller than a legal type
// should be returned in integer registers!
@@ -1493,14 +1494,14 @@
// type should be returned by reference!
SDOperand Lo, Hi;
SplitVectorOp(Tmp2, Lo, Hi);
- Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Hi);
+ Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi, Tmp3);
Result = LegalizeOp(Result);
}
}
break;
case Promote:
Tmp2 = PromoteOp(Node->getOperand(1));
- Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2);
+ Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3);
Result = LegalizeOp(Result);
break;
}
@@ -1511,10 +1512,11 @@
default: { // ret <values>
std::vector<SDOperand> NewValues;
NewValues.push_back(Tmp1);
- for (unsigned i = 1, e = Node->getNumOperands(); i != e; ++i)
+ for (unsigned i = 1, e = Node->getNumOperands(); i < e; i += 2)
switch (getTypeAction(Node->getOperand(i).getValueType())) {
case Legal:
NewValues.push_back(LegalizeOp(Node->getOperand(i)));
+ NewValues.push_back(Node->getOperand(i+1));
break;
case Expand: {
SDOperand Lo, Hi;
@@ -1522,7 +1524,9 @@
"FIXME: TODO: implement returning non-legal vector types!");
ExpandOp(Node->getOperand(i), Lo, Hi);
NewValues.push_back(Lo);
+ NewValues.push_back(Node->getOperand(i+1));
NewValues.push_back(Hi);
+ NewValues.push_back(Node->getOperand(i+1));
break;
}
case Promote:
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.251 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.252
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.251 Wed May 24 19:55:32 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri May 26 18:08:15 2006
@@ -722,10 +722,13 @@
NewValues.push_back(getRoot());
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
SDOperand RetOp = getValue(I.getOperand(i));
+ bool isSigned = I.getOperand(i)->getType()->isSigned();
// If this is an integer return value, we need to promote it ourselves to
// the full width of a register, since LegalizeOp will use ANY_EXTEND rather
// than sign/zero.
+ // FIXME: C calling convention requires the return type to be promoted to
+ // at least 32-bit. But this is not necessary for non-C calling conventions.
if (MVT::isInteger(RetOp.getValueType()) &&
RetOp.getValueType() < MVT::i64) {
MVT::ValueType TmpVT;
@@ -734,12 +737,13 @@
else
TmpVT = MVT::i32;
- if (I.getOperand(i)->getType()->isSigned())
+ if (isSigned)
RetOp = DAG.getNode(ISD::SIGN_EXTEND, TmpVT, RetOp);
else
RetOp = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, RetOp);
}
NewValues.push_back(RetOp);
+ NewValues.push_back(DAG.getConstant(isSigned, MVT::i32));
}
DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, NewValues));
}
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