[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMInstrInfo.td

[Rafael Espindola]

Changes in directory llvm/lib/Target/ARM:

ARMAsmPrinter.cpp updated: 1.3 -> 1.4
ARMInstrInfo.td updated: 1.2 -> 1.3
---
Log message:

On ARM, alignment is in bits
Add lr as a hard coded operand of bx



---
Diffs of the changes:  (+7 -2)

 ARMAsmPrinter.cpp |    3 ++-
 ARMInstrInfo.td   |    6 +++++-
 2 files changed, 7 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.3 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.4
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.3	Thu May 25 07:57:06 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp	Fri May 26 05:56:17 2006
@@ -44,6 +44,7 @@
       ZeroDirective = "\t.skip\t";
       CommentString = "!";
       ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
+      AlignmentIsInBytes = false;
     }
 
     /// We name each basic block in a Function with a unique number, so
@@ -110,7 +111,7 @@
     assert(0 && "Not implemented");
     break;
   }
-  EmitAlignment(4, F);
+  EmitAlignment(2, F);
   O << CurrentFnName << ":\n";
 
   // Print out code for the function.


Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.2 llvm/lib/Target/ARM/ARMInstrInfo.td:1.3
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.2	Thu May 18 16:45:49 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td	Fri May 26 05:56:17 2006
@@ -42,7 +42,11 @@
                                "!ADJCALLSTACKDOWN $amt",
                                [(callseq_start imm:$amt)]>;
 
-def BX: InstARM<(ops), "bx", [(retflag)]>;
+//bx supports other registers as operands. So this looks like a
+//hack. Maybe a ret should be expanded to a "branch lr" and bx
+//declared as a regular instruction
+
+def BX: InstARM<(ops), "bx lr", [(retflag)]>;
 
 def ldr   : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
                      "ldr $dst, [$addr]",