[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h
Evan Cheng
evan.cheng at apple.com
Thu May 18 13:42:20 PDT 2006
Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.86 -> 1.87
---
Log message:
lib/Target/Target.td
---
Diffs of the changes: (+20 -1)
TargetInstrInfo.h | 21 ++++++++++++++++++++-
1 files changed, 20 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.86 llvm/include/llvm/Target/TargetInstrInfo.h:1.87
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.86 Thu May 11 20:58:24 2006
+++ llvm/include/llvm/Target/TargetInstrInfo.h Thu May 18 15:42:07 2006
@@ -76,6 +76,11 @@
// block.
const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 11;
+// Machine operand flags
+// M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
+// requires a callback to look up its register class.
+const unsigned M_LOOK_UP_PTR_REG_CLASS = 1 << 0;
+
/// TargetOperandInfo - This holds information about one operand of a machine
/// instruction, indicating the register class for register operands, etc.
///
@@ -84,7 +89,7 @@
/// RegClass - This specifies the register class of the operand if the
/// operand is a register. If not, this contains null.
const TargetRegisterClass *RegClass;
-
+ unsigned Flags;
/// Currently no other information.
};
@@ -137,6 +142,13 @@
return get(Opcode).Name;
}
+ const TargetRegisterClass
+ *getInstrOperandRegClass(const TargetInstrDescriptor *II, unsigned Op) const {
+ const TargetOperandInfo &toi = II->OpInfo[Op];
+ return (toi.Flags & M_LOOK_UP_PTR_REG_CLASS)
+ ? getPointerRegClass() : toi.RegClass;
+ }
+
int getNumOperands(MachineOpCode Opcode) const {
return get(Opcode).numOperands;
}
@@ -275,6 +287,13 @@
assert(0 && "Target didn't implement insertNoop!");
abort();
}
+
+ /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
+ /// values.
+ virtual const TargetRegisterClass *getPointerRegClass() const {
+ assert(0 && "Target didn't implement getPointerRegClass!");
+ abort();
+ }
/// hasDelaySlot - Returns true if the specified instruction has a delay slot
/// which must be filled by the code generator.
More information about the llvm-commits
mailing list