[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.163 -> 1.164
---
Log message:

Compile this:

short test4(unsigned X) {
  return (X >> 16);
}

to:

_test4:
        movl 4(%esp), %eax
        sarl $16, %eax
        ret

instead of:

_test4:
        movl $-65536, %eax
        andl 4(%esp), %eax
        sarl $16, %eax
        ret



---
Diffs of the changes:  (+5 -0)

 DAGCombiner.cpp |    5 +++++
 1 files changed, 5 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.163 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.164
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.163	Sun May  7 20:35:01 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Mon May  8 15:51:54 2006
@@ -1575,6 +1575,11 @@
     }
   }
   
+  // Simplify, based on bits shifted out of the LHS. 
+  if (N1C && SimplifyDemandedBits(SDOperand(N, 0)))
+    return SDOperand(N, 0);
+  
+  
   // If the sign bit is known to be zero, switch this to a SRL.
   if (TLI.MaskedValueIsZero(N0, MVT::getIntVTSignBit(VT)))
     return DAG.getNode(ISD::SRL, VT, N0, N1);