[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrSSE.td

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.198 -> 1.199
X86InstrSSE.td updated: 1.115 -> 1.116
---
Log message:

Teach the code generator to use cvtss2sd as extload f32 -> f64


---
Diffs of the changes:  (+1 -5)

 X86ISelLowering.cpp |    4 ----
 X86InstrSSE.td      |    2 +-
 2 files changed, 1 insertion(+), 5 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.198 llvm/lib/Target/X86/X86ISelLowering.cpp:1.199
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.198	Tue May  2 20:29:57 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Fri May  5 16:35:18 2006
@@ -207,10 +207,6 @@
     addRegisterClass(MVT::f32, X86::FR32RegisterClass);
     addRegisterClass(MVT::f64, X86::FR64RegisterClass);
 
-    // SSE has no load+extend ops
-    setOperationAction(ISD::EXTLOAD,  MVT::f32, Expand);
-    setOperationAction(ISD::ZEXTLOAD, MVT::f32, Expand);
-
     // Use ANDPD to simulate FABS.
     setOperationAction(ISD::FABS , MVT::f64, Custom);
     setOperationAction(ISD::FABS , MVT::f32, Custom);


Index: llvm/lib/Target/X86/X86InstrSSE.td
diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.115 llvm/lib/Target/X86/X86InstrSSE.td:1.116
--- llvm/lib/Target/X86/X86InstrSSE.td:1.115	Wed May  3 15:32:03 2006
+++ llvm/lib/Target/X86/X86InstrSSE.td	Fri May  5 16:35:18 2006
@@ -526,7 +526,7 @@
                 Requires<[HasSSE2]>;
 def CVTSS2SDrm: I<0x5A, MRMSrcMem, (ops FR64:$dst, f32mem:$src),
                  "cvtss2sd {$src, $dst|$dst, $src}",
-                 [(set FR64:$dst, (fextend (loadf32 addr:$src)))]>, XS,
+                 [(set FR64:$dst, (extload addr:$src, f32))]>, XS,
                 Requires<[HasSSE2]>;
 
 // Match intrinsics which expect XMM operand(s).