[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcAsmPrinter.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/Sparc:

SparcAsmPrinter.cpp updated: 1.61 -> 1.62
---
Log message:

Remove a bunch more SparcV9 specific stuff


---
Diffs of the changes:  (+1 -8)

 SparcAsmPrinter.cpp |    9 +--------
 1 files changed, 1 insertion(+), 8 deletions(-)


Index: llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
diff -u llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.61 llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.62
--- llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.61	Wed May  3 19:44:25 2006
+++ llvm/lib/Target/Sparc/SparcAsmPrinter.cpp	Wed May  3 20:15:02 2006
@@ -147,12 +147,6 @@
   }
   switch (MO.getType()) {
   case MachineOperand::MO_VirtualRegister:
-    if (Value *V = MO.getVRegValueOrNull()) {
-      O << "<" << V->getName() << ">";
-      break;
-    }
-    // FALLTHROUGH
-  case MachineOperand::MO_MachineRegister:
     if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
       O << "%" << LowercaseString (RI.get(MO.getReg()).Name);
     else
@@ -195,8 +189,7 @@
   
   MachineOperand::MachineOperandType OpTy = MI->getOperand(opNum+1).getType();
   
-  if ((OpTy == MachineOperand::MO_VirtualRegister ||
-       OpTy == MachineOperand::MO_MachineRegister) &&
+  if (OpTy == MachineOperand::MO_VirtualRegister &&
       MI->getOperand(opNum+1).getReg() == SP::G0)
     return;   // don't print "+%g0"
   if ((OpTy == MachineOperand::MO_SignExtendedImmed ||