[llvm-commits] CVS: llvm-www/pubs/2006-06-15-VEE-VectorLLVA.html 2006-06-15-VEE-VectorLLVA.html~ 2006-06-15-VEE-VectorLLVA.pdf index.html
Robert L. Bocchino Jr.
bocchino at persephone.cs.uiuc.edu
Fri Apr 28 10:16:54 PDT 2006
Changes in directory llvm-www/pubs:
2006-06-15-VEE-VectorLLVA.html added (r1.1)
2006-06-15-VEE-VectorLLVA.html~ added (r1.1)
2006-06-15-VEE-VectorLLVA.pdf added (r1.1)
index.html updated: 1.37 -> 1.38
---
Log message:
Added VEE Vector LLVA paper to the pubs list.
---
Diffs of the changes: (+103 -0)
2006-06-15-VEE-VectorLLVA.html | 50 ++++++++++++++++++++++++++++++++++++++++
2006-06-15-VEE-VectorLLVA.html~ | 50 ++++++++++++++++++++++++++++++++++++++++
index.html | 3 ++
3 files changed, 103 insertions(+)
Index: llvm-www/pubs/2006-06-15-VEE-VectorLLVA.html
diff -c /dev/null llvm-www/pubs/2006-06-15-VEE-VectorLLVA.html:1.1
*** /dev/null Fri Apr 28 12:16:32 2006
--- llvm-www/pubs/2006-06-15-VEE-VectorLLVA.html Fri Apr 28 12:16:21 2006
***************
*** 0 ****
--- 1,50 ----
+ <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+ <html>
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=UTF-8" />
+ <link rel="stylesheet" href="../llvm.css" type="text/css" media="screen" />
+ <title>Vector LLVA: A Virtual Vector Instruction Set for Media Processing</title>
+ </head>
+ <body>
+
+ <div class="pub_title">
+ Vector LLVA: A Virtual Vector Instruction Set for Media Processing
+ </div>
+ <div class="pub_author">
+ Robert L. Bocchino Jr. and Vikram S. Adve
+ </div>
+
+ <h2>Abstract:</h2>
+ <blockquote>
+ We present Vector LLVA, a virtual instruction set architecture (V-ISA)
+ that exposes extensive static information about vector parallelism
+ while avoiding the use of hardware-specific parameters. We provide
+ both arbitrary-length vectors (for targets that allow vectors of
+ arbitrary length, or where the target length is not known) and
+ fixed-length vectors (for targets that have a fixed vector length,
+ such as subword SIMD extensions), together with a rich set of
+ operations on both vector types. We have implemented translators that
+ compile (1) Vector LLVA written with arbitrary-length vectors to the
+ Motorola RSVP architecture and (2) Vector LLVA written with
+ fixed-length vectors to both AltiVec and Intel SSE2. Our
+ translator-generated code achieves speedups competitive with
+ handwritten native code versions of several benchmarks on all three
+ architectures. These experiments show that our V-ISA design captures
+ vector parallelism for two quite different classes of architectures
+ and provides virtual object code portability within the class of
+ subword SIMD architectures.
+ </blockquote>
+
+ <h2>Published:</h2>
+ <blockquote>
+ "Vector LLVA: A Virtual Vector Instruction Set for Media Processing", Robert L. Bocchino Jr. and Vikram S. Adve.<br>
+ Proceedings of the Second International Conference on Virtual Execution Environments (VEE '06), Ottawa, Canada, 2006.
+ </blockquote>
+
+ <h2>Download:</h2>
+ <ul>
+ <li><a href="2006-06-15-VEE-VectorLLVA.pdf">Vector LLVA: A Virtual Vector Instruction Set for Media Processing</a> (PDF)</li>
+ </ul>
+
+ </body>
+ </html>
Index: llvm-www/pubs/2006-06-15-VEE-VectorLLVA.html~
diff -c /dev/null llvm-www/pubs/2006-06-15-VEE-VectorLLVA.html~:1.1
*** /dev/null Fri Apr 28 12:16:53 2006
--- llvm-www/pubs/2006-06-15-VEE-VectorLLVA.html~ Fri Apr 28 12:16:21 2006
***************
*** 0 ****
--- 1,50 ----
+ <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+ <html>
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=UTF-8" />
+ <link rel="stylesheet" href="../llvm.css" type="text/css" media="screen" />
+ <title>Vector LLVA: A Virtual Vector Instruction Set for Media Processing</title>
+ </head>
+ <body>
+
+ <div class="pub_title">
+ Vector LLVA: A Virtual Vector Instruction Set for Media Processing
+ </div>
+ <div class="pub_author">
+ Robert L. Bocchino Jr. and Vikram S. Adve
+ </div>
+
+ <h2>Abstract:</h2>
+ <blockquote>
+ We present Vector LLVA, a virtual instruction set architecture (V-ISA)
+ that exposes extensive static information about vector parallelism
+ while avoiding the use of hardware-specific parameters. We provide
+ both arbitrary-length vectors (for targets that allow vectors of
+ arbitrary length, or where the target length is not known) and
+ fixed-length vectors (for targets that have a fixed vector length,
+ such as subword SIMD extensions), together with a rich set of
+ operations on both vector types. We have implemented translators that
+ compile (1) Vector LLVA written with arbitrary-length vectors to the
+ Motorola RSVP architecture and (2) Vector LLVA written with
+ fixed-length vectors to both AltiVec and Intel SSE2. Our
+ translator-generated code achieves speedups competitive with
+ handwritten native code versions of several benchmarks on all three
+ architectures. These experiments show that our V-ISA design captures
+ vector parallelism for two quite different classes of architectures
+ and provides virtual object code portability within the class of
+ subword SIMD architectures.
+ </blockquote>
+
+ <h2>Published:</h2>
+ <blockquote>
+ "Vector LLVA: A Virtual Vector Instruction Set for Media Processing", Robert L. Bocchino Jr. and Vikram S. Adve.<br>
+ Proceedings of the Second International Conference on Virtual Execution Environments (VEE '06), Ottawa, Canada, 2006.
+ </blockquote>
+
+ <h2>Download:</h2>
+ <ul>
+ <li><a href="2006-06-15-VEE-VectorLLVA.pdf">Vector LLVA: A Virtual Vector Instruction Set forr Media Processing</a> (PDF)</li>
+ </ul>
+
+ </body>
+ </html>
Index: llvm-www/pubs/2006-06-15-VEE-VectorLLVA.pdf
Index: llvm-www/pubs/index.html
diff -u llvm-www/pubs/index.html:1.37 llvm-www/pubs/index.html:1.38
--- llvm-www/pubs/index.html:1.37 Tue Apr 25 23:46:11 2006
+++ llvm-www/pubs/index.html Fri Apr 28 12:16:22 2006
@@ -38,6 +38,9 @@
<ol>
+<li>"<a href="2006-06-15-VEE-VectorLLVA.html">Vector LLVA: A Virtual Vector Instruction Set for Media Processing</a>"<br>Robert L. Bocchino Jr. and Vikram S. Adve.<br><i>
+Proc. of the Second International Conference on Virtual Execution Environments (VEE'06)</i>, Ottawa, Canada, 2006.<br></li>
+
<li>"<a href="2006-04-04-CGO-GraphColoring.html">Tailoring Graph-coloring Register Allocation For Runtime Compilation</a>"<br>Keith D. Cooper and Anshuman Dasgupta<br><i> Proc. of the 2006 International Symposium on Code Generation and Optimization (CGO'06)</i>, New York, New York, 2006.<br></li>
<li>"<a href="2005-TR-DSAEvaluation.html">How Successful is Data Structure Analysis in Isolating and Analyzing
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