[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrInfo.td

[Evan Cheng]

Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.193 -> 1.194
X86InstrInfo.td updated: 1.262 -> 1.263
---
Log message:

Make x86 isel lowering produce tailcall nodes. They are match to normal calls
for now.

Patch contributed by Alexander Friedman.


---
Diffs of the changes:  (+17 -1)

 X86ISelLowering.cpp |    2 +-
 X86InstrInfo.td     |   16 ++++++++++++++++
 2 files changed, 17 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.193 llvm/lib/Target/X86/X86ISelLowering.cpp:1.194
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.193	Thu Apr 27 03:31:10 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Apr 27 03:40:39 2006
@@ -1203,7 +1203,7 @@
     Ops.push_back(InFlag);
 
   // FIXME: Do not generate X86ISD::TAILCALL for now.
-  Chain = DAG.getNode(X86ISD::CALL, NodeTys, Ops);
+  Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, NodeTys, Ops);
   InFlag = Chain.getValue(1);
 
   NodeTys.clear();


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.262 llvm/lib/Target/X86/X86InstrInfo.td:1.263
--- llvm/lib/Target/X86/X86InstrInfo.td:1.262	Sat Apr 22 17:31:45 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Thu Apr 27 03:40:39 2006
@@ -75,6 +75,9 @@
 def X86call    : SDNode<"X86ISD::CALL",     SDT_X86Call,
                         [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>;
 
+def X86tailcall    : SDNode<"X86ISD::TAILCALL",     SDT_X86Call,
+                        [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>;
+
 def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr,
                         [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
 def X86rep_movs: SDNode<"X86ISD::REP_MOVS", SDTX86RepStr,
@@ -2329,6 +2332,19 @@
           (MOV32mi addr:$dst, texternalsym:$src)>;
 
 // Calls
+def : Pat<(X86tailcall R32:$dst),
+      (CALL32r     R32:$dst)>;
+
+def : Pat<(X86tailcall (loadi32 addr:$dst)),
+      (CALL32m addr:$dst)>;
+
+def : Pat<(X86tailcall tglobaladdr:$dst),
+          (CALLpcrel32 tglobaladdr:$dst)>;
+def : Pat<(X86tailcall texternalsym:$dst),
+          (CALLpcrel32 texternalsym:$dst)>;
+
+
+
 def : Pat<(X86call tglobaladdr:$dst),
           (CALLpcrel32 tglobaladdr:$dst)>;
 def : Pat<(X86call texternalsym:$dst),