[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86InstrInfo.cpp updated: 1.48 -> 1.49
---
Log message:

Teach the codegen about instructions used for SSE spill code, allowing it
to optimize cases where it has to spill a lot


---
Diffs of the changes:  (+4 -0)

 X86InstrInfo.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/X86/X86InstrInfo.cpp
diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.48 llvm/lib/Target/X86/X86InstrInfo.cpp:1.49
--- llvm/lib/Target/X86/X86InstrInfo.cpp:1.48	Mon Apr  3 15:53:28 2006
+++ llvm/lib/Target/X86/X86InstrInfo.cpp	Tue Apr 18 11:44:51 2006
@@ -56,6 +56,8 @@
   case X86::FpLD64m:
   case X86::MOVSSrm:
   case X86::MOVSDrm:
+  case X86::MOVAPSrm:
+  case X86::MOVAPDrm:
     if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
         MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() &&
         MI->getOperand(2).getImmedValue() == 1 &&
@@ -79,6 +81,8 @@
   case X86::FpSTP64m:
   case X86::MOVSSmr:
   case X86::MOVSDmr:
+  case X86::MOVAPSmr:
+  case X86::MOVAPDmr:
     if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() &&
         MI->getOperand(2).isRegister() && MI->getOperand(3).isImmediate() &&
         MI->getOperand(1).getImmedValue() == 1 &&