[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp README_ALTIVEC.txt

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.162 -> 1.163
README_ALTIVEC.txt updated: 1.27 -> 1.28
---
Log message:

Implement v16i8 multiply with this code:

        vmuloub v5, v3, v2
        vmuleub v2, v3, v2
        vperm v2, v2, v5, v4

This implements CodeGen/PowerPC/vec_mul.ll.  With this, v16i8 multiplies are
6.79x faster than before.

Overall, UnitTests/Vector/multiplies.c is now 2.45x faster with LLVM than with
GCC.

Remove the 'integer multiplies' todo from the README file.



---
Diffs of the changes:  (+25 -11)

 PPCISelLowering.cpp |   27 +++++++++++++++++++++++++--
 README_ALTIVEC.txt  |    9 ---------
 2 files changed, 25 insertions(+), 11 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.162 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.163
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.162	Mon Apr 17 22:43:48 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Mon Apr 17 22:57:35 2006
@@ -229,6 +229,7 @@
     setOperationAction(ISD::MUL, MVT::v4f32, Legal);
     setOperationAction(ISD::MUL, MVT::v4i32, Custom);
     setOperationAction(ISD::MUL, MVT::v8i16, Custom);
+    setOperationAction(ISD::MUL, MVT::v16i8, Custom);
 
     setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom);
     setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom);
@@ -1601,12 +1602,12 @@
   } else if (Op.getValueType() == MVT::v8i16) {
     SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1);
     
-    // Multiply the even 16-parts, producing 32-bit sums.
+    // Multiply the even 16-bit parts, producing 32-bit sums.
     SDOperand EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleuh,
                                            LHS, RHS, DAG, MVT::v4i32);
     EvenParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, EvenParts);
     
-    // Multiply the odd 16-parts, producing 32-bit sums.
+    // Multiply the odd 16-bit parts, producing 32-bit sums.
     SDOperand OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmulouh,
                                           LHS, RHS, DAG, MVT::v4i32);
     OddParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, OddParts);
@@ -1620,6 +1621,28 @@
     
     return DAG.getNode(ISD::VECTOR_SHUFFLE, MVT::v8i16, EvenParts, OddParts,
                        DAG.getNode(ISD::BUILD_VECTOR, MVT::v8i16, Ops));
+  } else if (Op.getValueType() == MVT::v16i8) {
+    SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1);
+    
+    // Multiply the even 8-bit parts, producing 16-bit sums.
+    SDOperand EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleub,
+                                           LHS, RHS, DAG, MVT::v8i16);
+    EvenParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v16i8, EvenParts);
+    
+    // Multiply the odd 8-bit parts, producing 16-bit sums.
+    SDOperand OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuloub,
+                                          LHS, RHS, DAG, MVT::v8i16);
+    OddParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v16i8, OddParts);
+    
+    // Merge the results together.
+    std::vector<SDOperand> Ops;
+    for (unsigned i = 0; i != 8; ++i) {
+      Ops.push_back(DAG.getConstant(2*i+1, MVT::i8));
+      Ops.push_back(DAG.getConstant(2*i+1+16, MVT::i8));
+    }
+    
+    return DAG.getNode(ISD::VECTOR_SHUFFLE, MVT::v16i8, EvenParts, OddParts,
+                       DAG.getNode(ISD::BUILD_VECTOR, MVT::v16i8, Ops));
   } else {
     assert(0 && "Unknown mul to lower!");
     abort();


Index: llvm/lib/Target/PowerPC/README_ALTIVEC.txt
diff -u llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.27 llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.28
--- llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.27	Mon Apr 17 16:52:03 2006
+++ llvm/lib/Target/PowerPC/README_ALTIVEC.txt	Mon Apr 17 22:57:35 2006
@@ -75,15 +75,6 @@
 
 //===----------------------------------------------------------------------===//
 
-Implement multiply for vector integer types, to avoid the horrible scalarized
-code produced by legalize.
-
-void test(vector int *X, vector int *Y) {
-  *X = *X * *Y;
-}
-
-//===----------------------------------------------------------------------===//
-
 extract_vector_elt of an arbitrary constant vector can be done with the 
 following instructions: