[llvm-commits] CVS: llvm/lib/Target/PowerPC/README_ALTIVEC.txt

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

README_ALTIVEC.txt updated: 1.19 -> 1.20
---
Log message:

we have a shuffle instr, add an example.


---
Diffs of the changes:  (+6 -5)

 README_ALTIVEC.txt |   11 ++++++-----
 1 files changed, 6 insertions(+), 5 deletions(-)


Index: llvm/lib/Target/PowerPC/README_ALTIVEC.txt
diff -u llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.19 llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.20
--- llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.19	Thu Apr  6 18:16:19 2006
+++ llvm/lib/Target/PowerPC/README_ALTIVEC.txt	Tue Apr 11 13:47:03 2006
@@ -96,11 +96,6 @@
  
 //===----------------------------------------------------------------------===//
 
-We need an LLVM 'shuffle' instruction, that corresponds to the VECTOR_SHUFFLE
-node.
-
-//===----------------------------------------------------------------------===//
-
 We need a way to teach tblgen that some operands of an intrinsic are required to
 be constants.  The verifier should enforce this constraint.
 
@@ -133,4 +128,10 @@
 of instructions (e.g. a vsldoi + vpkuhum).  We should pattern match these, but
 there are a huge number of these.
 
+Specific examples:
+
+C = vector_shuffle A, B, <0, 1, 2, 4>
+->  t = vsldoi A, A, 12
+->  C = vsldoi A, B, 4
+
 //===----------------------------------------------------------------------===//