[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Chris Lattner
lattner at cs.uiuc.edu
Mon Apr 10 18:38:50 PDT 2006
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.143 -> 1.144
---
Log message:
Vector function results go into V2 according to GCC. The darwin ABI doc
doesn't say where they go :-/
---
Diffs of the changes: (+10 -1)
PPCISelLowering.cpp | 11 ++++++++++-
1 files changed, 10 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.143 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.144
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.143 Mon Apr 10 20:21:43 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Mon Apr 10 20:38:39 2006
@@ -877,7 +877,16 @@
return SDOperand(); // ret void is legal
case 2: {
MVT::ValueType ArgVT = Op.getOperand(1).getValueType();
- unsigned ArgReg = MVT::isInteger(ArgVT) ? PPC::R3 : PPC::F1;
+ unsigned ArgReg;
+ if (MVT::isVector(ArgVT))
+ ArgReg = PPC::V2;
+ else if (MVT::isInteger(ArgVT))
+ ArgReg = PPC::R3;
+ else {
+ assert(MVT::isFloatingPoint(ArgVT));
+ ArgReg = PPC::F1;
+ }
+
Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1),
SDOperand());
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