[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Chris Lattner lattner at cs.uiuc.edu
Thu Apr 6 16:12:32 PDT 2006



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.137 -> 1.138
---
Log message:

Make sure to return the result in the right type.


---
Diffs of the changes:  (+6 -4)

 PPCISelLowering.cpp |   10 ++++++----
 1 files changed, 6 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.137 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.138
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.137	Thu Apr  6 17:28:36 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Thu Apr  6 18:12:19 2006
@@ -962,10 +962,12 @@
     assert(CompareOpc>0 && "We only lower altivec predicate compares so far!");
 
     // If this is a non-dot comparison, make the VCMP node.
-    if (!isDot)
-      return DAG.getNode(PPCISD::VCMP, Op.getOperand(2).getValueType(),
-                         Op.getOperand(1), Op.getOperand(2),
-                         DAG.getConstant(CompareOpc, MVT::i32));
+    if (!isDot) {
+      SDOperand Tmp = DAG.getNode(PPCISD::VCMP, Op.getOperand(2).getValueType(),
+                                  Op.getOperand(1), Op.getOperand(2),
+                                  DAG.getConstant(CompareOpc, MVT::i32));
+      return DAG.getNode(ISD::BIT_CONVERT, Op.getValueType(), Tmp);
+    }
     
     // Create the PPCISD altivec 'dot' comparison node.
     std::vector<SDOperand> Ops;






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