[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Chris Lattner
lattner at cs.uiuc.edu
Mon Apr 3 16:58:17 PDT 2006
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.127 -> 1.128
---
Log message:
Revert accidentally committed hunks.
---
Diffs of the changes: (+1 -3)
PPCISelLowering.cpp | 4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.127 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.128
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.127 Mon Apr 3 18:55:43 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Mon Apr 3 18:58:04 2006
@@ -182,7 +182,7 @@
setOperationAction(ISD::XOR , (MVT::ValueType)VT, Legal);
// We can custom expand all VECTOR_SHUFFLEs to VPERM.
- setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Promote);
+ setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Custom);
setOperationAction(ISD::MUL , (MVT::ValueType)VT, Expand);
setOperationAction(ISD::SDIV, (MVT::ValueType)VT, Expand);
@@ -196,8 +196,6 @@
setOperationAction(ISD::SCALAR_TO_VECTOR, (MVT::ValueType)VT, Expand);
}
- setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom);
-
addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass);
addRegisterClass(MVT::v4i32, PPC::VRRCRegisterClass);
addRegisterClass(MVT::v8i16, PPC::VRRCRegisterClass);
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