[llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td

Evan Cheng evan.cheng at apple.com
Fri Mar 31 11:21:27 PST 2006



Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.62 -> 1.63
---
Log message:

Add vector_extract and vector_insert nodes.


---
Diffs of the changes:  (+4 -0)

 TargetSelectionDAG.td |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.62 llvm/lib/Target/TargetSelectionDAG.td:1.63
--- llvm/lib/Target/TargetSelectionDAG.td:1.62	Mon Mar 27 18:40:33 2006
+++ llvm/lib/Target/TargetSelectionDAG.td	Fri Mar 31 13:21:16 2006
@@ -310,6 +310,10 @@
 def build_vector : SDNode<"ISD::BUILD_VECTOR", SDTypeProfile<1, 0, []>, []>;
 def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>,
                               []>;
+def vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
+    SDTypeProfile<1, 2, []>, []>;
+def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
+    SDTypeProfile<1, 3, []>, []>;
 
 // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use
 // these internally.  Don't reference these directly.






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