[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCInstrAltivec.td README_ALTIVEC.txt

[Nate Begeman]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.117 -> 1.118
PPCInstrAltivec.td updated: 1.16 -> 1.17
README_ALTIVEC.txt updated: 1.3 -> 1.4
---
Log message:

Add a few more altivec intrinsics


---
Diffs of the changes:  (+28 -6)

 PPCISelLowering.cpp |    4 ++--
 PPCInstrAltivec.td  |   28 ++++++++++++++++++++++++++--
 README_ALTIVEC.txt  |    2 --
 3 files changed, 28 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.117 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.118
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.117	Mon Mar 27 19:43:22 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Mon Mar 27 22:15:58 2006
@@ -300,8 +300,8 @@
   
   if (OpVal.Val == 0) return false;  // All UNDEF: use implicit def.
   
-  unsigned ValSizeInBytes;
-  uint64_t Value;
+  unsigned ValSizeInBytes = 0;
+  uint64_t Value = 0;
   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) {
     Value = CN->getValue();
     ValSizeInBytes = MVT::getSizeInBits(CN->getValueType(0))/8;


Index: llvm/lib/Target/PowerPC/PPCInstrAltivec.td
diff -u llvm/lib/Target/PowerPC/PPCInstrAltivec.td:1.16 llvm/lib/Target/PowerPC/PPCInstrAltivec.td:1.17
--- llvm/lib/Target/PowerPC/PPCInstrAltivec.td:1.16	Mon Mar 27 20:29:37 2006
+++ llvm/lib/Target/PowerPC/PPCInstrAltivec.td	Mon Mar 27 22:15:58 2006
@@ -121,7 +121,14 @@
                        [(set VRRC:$vD, (fneg (fsub (fmul VRRC:$vA, VRRC:$vC),
                                                    VRRC:$vB)))]>,
                        Requires<[FPContractions]>;
-
+def VMHADDSHS  : VAForm_1a<32, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
+                  "vmhaddshs $vD, $vA, $vB, $vC", VecFP,
+                  [(set VRRC:$vD,
+                   (int_ppc_altivec_vmhaddshs VRRC:$vA, VRRC:$vB, VRRC:$vC))]>;
+def VMHRADDSHS : VAForm_1a<33, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
+                  "vmhraddshs $vD, $vA, $vB, $vC", VecFP,
+                  [(set VRRC:$vD,
+                   (int_ppc_altivec_vmhraddshs VRRC:$vA, VRRC:$vB, VRRC:$vC))]>;
 def VPERM   : VAForm_1a<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
                         "vperm $vD, $vA, $vB, $vC", VecPerm,
                         [(set VRRC:$vD,
@@ -213,6 +220,22 @@
 def VMINFP : VXForm_1<1098, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
                       "vminfp $vD, $vA, $vB", VecFP,
                       []>;
+def VMRGHH : VXForm_1<76, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+                      "vmrghh $vD, $vA, $vB", VecFP,
+                      [(set VRRC:$vD,
+                       (int_ppc_altivec_vmrghh VRRC:$vA, VRRC:$vB))]>;
+def VMRGHW : VXForm_1<140, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+                      "vmrghh $vD, $vA, $vB", VecFP,
+                      [(set VRRC:$vD,
+                       (int_ppc_altivec_vmrghw VRRC:$vA, VRRC:$vB))]>;
+def VMRGLH : VXForm_1<332, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+                      "vmrglh $vD, $vA, $vB", VecFP,
+                      [(set VRRC:$vD,
+                       (int_ppc_altivec_vmrglh VRRC:$vA, VRRC:$vB))]>;
+def VMRGLW : VXForm_1<396, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+                      "vmrglh $vD, $vA, $vB", VecFP,
+                      [(set VRRC:$vD,
+                       (int_ppc_altivec_vmrglw VRRC:$vA, VRRC:$vB))]>;
 def VREFP  : VXForm_2<266, (ops VRRC:$vD, VRRC:$vB),
                       "vrefp $vD, $vB", VecFP,
                       [(set VRRC:$vD, (int_ppc_altivec_vrefp VRRC:$vB))]>;
@@ -598,7 +621,8 @@
           (VMADDFP VRRC:$A, VRRC:$B, VRRC:$C)>;
 def : Pat<(int_ppc_altivec_vnmsubfp VRRC:$A, VRRC:$B, VRRC:$C),
           (VNMSUBFP VRRC:$A, VRRC:$B, VRRC:$C)>;
-
+def : Pat<(int_ppc_altivec_vperm VRRC:$A, VRRC:$B, VRRC:$C),
+          (VPERM VRRC:$A, VRRC:$B, VRRC:$C)>;
 def : Pat<(vector_shuffle (v4i32 VRRC:$vB), (undef), VSPLT_shuffle_mask:$UIMM),
           (v4i32 (VSPLTW VSPLT_shuffle_mask:$UIMM, VRRC:$vB))>;
 


Index: llvm/lib/Target/PowerPC/README_ALTIVEC.txt
diff -u llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.3 llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.4
--- llvm/lib/Target/PowerPC/README_ALTIVEC.txt:1.3	Mon Mar 27 20:29:37 2006
+++ llvm/lib/Target/PowerPC/README_ALTIVEC.txt	Mon Mar 27 22:15:58 2006
@@ -54,13 +54,11 @@
 mf*
 vavg*
 vmax*
-vmhaddshs/vmhraddshs
 vmin*
 vmladduhm
 vmr*
 vmsum*
 vmul*
-vperm
 vpk*
 vsel (some aliases only accessible using builtins)
 vup*