[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h

[Evan Cheng]

Changes in directory llvm/include/llvm/CodeGen:

SelectionDAGNodes.h updated: 1.121 -> 1.122
---
Log message:

Add ISD::isBuildVectorAllZeros predicate

---
Diffs of the changes:  (+4 -1)

 SelectionDAGNodes.h |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.121 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.122
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.121	Sat Mar 25 16:56:35 2006
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h	Sun Mar 26 03:50:58 2006
@@ -458,7 +458,10 @@
   /// isBuildVectorAllOnesInteger - Return true if the specified node is a
   /// BUILD_VECTOR where all of the elements are ~0 or undef.
   bool isBuildVectorAllOnesInteger(const SDNode *N);
-  
+
+  /// isBuildVectorAllZeros - Return true if the specified node is a
+  /// BUILD_VECTOR where all of the elements are 0 or undef.
+  bool isBuildVectorAllZeros(const SDNode *N);
   
   //===--------------------------------------------------------------------===//
   /// ISD::CondCode enum - These are ordered carefully to make the bitfields