[llvm-commits] CVS: llvm/lib/Target/X86/README.txt X86ISelLowering.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.72 -> 1.73
X86ISelLowering.cpp updated: 1.127 -> 1.128
---
Log message:

Gabor points out that we can't spell. :)


---
Diffs of the changes:  (+4 -4)

 README.txt          |    4 ++--
 X86ISelLowering.cpp |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.72 llvm/lib/Target/X86/README.txt:1.73
--- llvm/lib/Target/X86/README.txt:1.72	Fri Mar 24 00:40:32 2006
+++ llvm/lib/Target/X86/README.txt	Fri Mar 24 01:12:19 2006
@@ -547,7 +547,7 @@
 
 //===---------------------------------------------------------------------===//
 
-Teach the coallescer to commute 2-addr instructions, allowing us to eliminate
+Teach the coalescer to commute 2-addr instructions, allowing us to eliminate
 the reg-reg copy in this example:
 
 float foo(int *x, float *y, unsigned c) {
@@ -642,7 +642,7 @@
 
 //===---------------------------------------------------------------------===//
 
-Teach the coallescer to coales vregs of different register classes. e.g. FR32 /
+Teach the coalescer to coalesce vregs of different register classes. e.g. FR32 /
 FR64 to VR128.
 
 //===---------------------------------------------------------------------===//


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.127 llvm/lib/Target/X86/X86ISelLowering.cpp:1.128
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.127	Fri Mar 24 00:40:32 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Fri Mar 24 01:12:19 2006
@@ -660,10 +660,10 @@
 // EDX".  Anything more is illegal.
 //
 // FIXME: The linscan register allocator currently has problem with
-// coallescing.  At the time of this writing, whenever it decides to coallesce
+// coalescing.  At the time of this writing, whenever it decides to coalesce
 // a physreg with a virtreg, this increases the size of the physreg's live
 // range, and the live range cannot ever be reduced.  This causes problems if
-// too many physregs are coalleced with virtregs, which can cause the register
+// too many physregs are coaleced with virtregs, which can cause the register
 // allocator to wedge itself.
 //
 // This code triggers this problem more often if we pass args in registers,