[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp DAGISelEmitter.h
Evan Cheng
evan.cheng at apple.com
Sun Mar 19 22:04:21 PST 2006
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.177 -> 1.178
DAGISelEmitter.h updated: 1.58 -> 1.59
---
Log message:
Copy matching pattern's output type info to instruction result pattern.
The instruction patterns do not contain enough information to resolve the
exact type of the destination if it of a generic vector type.
---
Diffs of the changes: (+14 -6)
DAGISelEmitter.cpp | 17 ++++++++++++-----
DAGISelEmitter.h | 3 ++-
2 files changed, 14 insertions(+), 6 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.177 llvm/utils/TableGen/DAGISelEmitter.cpp:1.178
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.177 Sun Mar 19 23:39:47 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Mon Mar 20 00:04:09 2006
@@ -1105,7 +1105,7 @@
void DAGISelEmitter::
FindPatternInputsAndOutputs(TreePattern *I, TreePatternNode *Pat,
std::map<std::string, TreePatternNode*> &InstInputs,
- std::map<std::string, Record*> &InstResults,
+ std::map<std::string, TreePatternNode*> &InstResults,
std::vector<Record*> &InstImpInputs,
std::vector<Record*> &InstImpResults) {
if (Pat->isLeaf()) {
@@ -1159,7 +1159,7 @@
I->error("set destination must have a name!");
if (InstResults.count(Dest->getName()))
I->error("cannot set '" + Dest->getName() +"' multiple times");
- InstResults[Dest->getName()] = Val->getDef();
+ InstResults[Dest->getName()] = Dest;
} else if (Val->getDef()->isSubClassOf("Register")) {
InstImpResults.push_back(Val->getDef());
} else {
@@ -1235,7 +1235,7 @@
// InstResults - Keep track of all the virtual registers that are 'set'
// in the instruction, including what reg class they are.
- std::map<std::string, Record*> InstResults;
+ std::map<std::string, TreePatternNode*> InstResults;
std::vector<Record*> InstImpInputs;
std::vector<Record*> InstImpResults;
@@ -1265,6 +1265,7 @@
// Check that all of the results occur first in the list.
std::vector<Record*> Results;
+ TreePatternNode *Res0Node = NULL;
for (unsigned i = 0; i != NumResults; ++i) {
if (i == CGI.OperandList.size())
I->error("'" + InstResults.begin()->first +
@@ -1272,7 +1273,10 @@
const std::string &OpName = CGI.OperandList[i].Name;
// Check that it exists in InstResults.
- Record *R = InstResults[OpName];
+ TreePatternNode *RNode = InstResults[OpName];
+ if (i == 0)
+ Res0Node = RNode;
+ Record *R = dynamic_cast<DefInit*>(RNode->getLeafValue())->getDef();
if (R == 0)
I->error("Operand $" + OpName + " should be a set destination: all "
"outputs must occur before inputs in operand list!");
@@ -1337,6 +1341,9 @@
TreePatternNode *ResultPattern =
new TreePatternNode(I->getRecord(), ResultNodeOperands);
+ // Copy fully inferred output node type to instruction result pattern.
+ if (NumResults > 0)
+ ResultPattern->setTypes(Res0Node->getExtTypes());
// Create and insert the instruction.
DAGInstruction TheInst(I, Results, Operands, InstImpResults, InstImpInputs);
@@ -1407,7 +1414,7 @@
// Validate that the input pattern is correct.
{
std::map<std::string, TreePatternNode*> InstInputs;
- std::map<std::string, Record*> InstResults;
+ std::map<std::string, TreePatternNode*> InstResults;
std::vector<Record*> InstImpInputs;
std::vector<Record*> InstImpResults;
FindPatternInputsAndOutputs(Pattern, Pattern->getOnlyTree(),
Index: llvm/utils/TableGen/DAGISelEmitter.h
diff -u llvm/utils/TableGen/DAGISelEmitter.h:1.58 llvm/utils/TableGen/DAGISelEmitter.h:1.59
--- llvm/utils/TableGen/DAGISelEmitter.h:1.58 Sun Mar 19 23:39:48 2006
+++ llvm/utils/TableGen/DAGISelEmitter.h Mon Mar 20 00:04:09 2006
@@ -469,7 +469,8 @@
void FindPatternInputsAndOutputs(TreePattern *I, TreePatternNode *Pat,
std::map<std::string,
TreePatternNode*> &InstInputs,
- std::map<std::string, Record*> &InstResults,
+ std::map<std::string,
+ TreePatternNode*> &InstResults,
std::vector<Record*> &InstImpInputs,
std::vector<Record*> &InstImpResults);
void GenerateCodeForPattern(PatternToMatch &Pattern,
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