[llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td

[Chris Lattner]

Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.52 -> 1.53
---
Log message:

add vector_shuffle


---
Diffs of the changes:  (+16 -0)

 TargetSelectionDAG.td |   16 ++++++++++++++++
 1 files changed, 16 insertions(+)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.52 llvm/lib/Target/TargetSelectionDAG.td:1.53
--- llvm/lib/Target/TargetSelectionDAG.td:1.52	Wed Mar 15 19:29:53 2006
+++ llvm/lib/Target/TargetSelectionDAG.td	Sun Mar 19 23:40:45 2006
@@ -51,6 +51,15 @@
   int BigOperandNum = BigOp;
 }
 
+/// SDTCisIntVectorOfSameSize - This indicates that ThisOp and OtherOp are
+/// packed vector types, and that ThisOp is the result of 
+/// MVT::getIntVectorWithNumElements with the number of elements that ThisOp
+/// has.
+class SDTCisIntVectorOfSameSize<int ThisOp, int OtherOp>
+  : SDTypeConstraint<ThisOp> {
+  int OtherOpNum = OtherOp;
+}
+
 //===----------------------------------------------------------------------===//
 // Selection DAG Type Profile definitions.
 //
@@ -161,6 +170,10 @@
   SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>
 ]>;
 
+def SDTVecShuffle : SDTypeProfile<1, 3, [
+  SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisIntVectorOfSameSize<3, 0>
+]>;
+
 //===----------------------------------------------------------------------===//
 // Selection DAG Node Properties.
 //
@@ -293,6 +306,9 @@
 def extld      : SDNode<"ISD::EXTLOAD"    , SDTExtLoad,    [SDNPHasChain]>;
 def truncst    : SDNode<"ISD::TRUNCSTORE" , SDTTruncStore, [SDNPHasChain]>;
 
+def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>;
+
+
 //===----------------------------------------------------------------------===//
 // Selection DAG Condition Codes