[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Chris Lattner
lattner at cs.uiuc.edu
Sun Mar 12 22:51:42 PST 2006
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.124 -> 1.125
---
Log message:
Fold X+Y -> X|Y when safe. This implements:
Regression/CodeGen/PowerPC/and_add.ll
a case that occurs with dynamic allocas of constant size.
---
Diffs of the changes: (+19 -1)
DAGCombiner.cpp | 20 +++++++++++++++++++-
1 files changed, 19 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.124 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.125
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.124 Mon Mar 13 00:26:26 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Mar 13 00:51:27 2006
@@ -714,9 +714,27 @@
// fold (A+(B-A)) -> B
if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
return N1.getOperand(0);
- //
+
if (!MVT::isVector(VT) && SimplifyDemandedBits(SDOperand(N, 0)))
return SDOperand();
+
+ // fold (a+b) -> (a|b) iff a and b share no bits.
+ if (MVT::isInteger(VT) && !MVT::isVector(VT)) {
+ uint64_t LHSZero, LHSOne;
+ uint64_t RHSZero, RHSOne;
+ uint64_t Mask = MVT::getIntVTBitMask(VT);
+ TLI.ComputeMaskedBits(N0, Mask, LHSZero, LHSOne);
+ if (LHSZero) {
+ TLI.ComputeMaskedBits(N1, Mask, RHSZero, RHSOne);
+
+ // If all possibly-set bits on the LHS are clear on the RHS, return an OR.
+ // If all possibly-set bits on the RHS are clear on the LHS, return an OR.
+ if ((RHSZero & (~LHSZero & Mask)) == (~LHSZero & Mask) ||
+ (LHSZero & (~RHSZero & Mask)) == (~RHSZero & Mask))
+ return DAG.getNode(ISD::OR, VT, N0, N1);
+ }
+ }
+
return SDOperand();
}
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