[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCISelLowering.h

Chris Lattner lattner at cs.uiuc.edu
Tue Feb 21 16:56:51 PST 2006



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.89 -> 1.90
PPCISelLowering.h updated: 1.22 -> 1.23
---
Log message:

split register class handling from explicit physreg handling.


---
Diffs of the changes:  (+5 -6)

 PPCISelLowering.cpp |    7 +++----
 PPCISelLowering.h   |    4 ++--
 2 files changed, 5 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.89 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.90
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.89	Tue Feb 21 17:11:00 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Tue Feb 21 18:56:38 2006
@@ -999,8 +999,8 @@
 
 
 std::vector<unsigned> PPCTargetLowering::
-getRegForInlineAsmConstraint(const std::string &Constraint,
-                             MVT::ValueType VT) const {
+getRegClassForInlineAsmConstraint(const std::string &Constraint,
+                                  MVT::ValueType VT) const {
   if (Constraint.size() == 1) {
     switch (Constraint[0]) {      // GCC RS6000 Constraint Letters
     default: break;  // Unknown constriant letter
@@ -1051,8 +1051,7 @@
     }
   }
   
-  // Handle explicit register names.
-  return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
+  return std::vector<unsigned>();
 }
 
 // isOperandValidForConstraint


Index: llvm/lib/Target/PowerPC/PPCISelLowering.h
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.22 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.23
--- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.22	Tue Feb 21 17:11:00 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.h	Tue Feb 21 18:56:38 2006
@@ -99,8 +99,8 @@
     
     ConstraintType getConstraintType(char ConstraintLetter) const;
     std::vector<unsigned> 
-      getRegForInlineAsmConstraint(const std::string &Constraint,
-                                   MVT::ValueType VT) const;
+      getRegClassForInlineAsmConstraint(const std::string &Constraint,
+                                        MVT::ValueType VT) const;
     bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter);
   };
 }






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