[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h

Chris Lattner lattner at cs.uiuc.edu
Tue Feb 21 15:10:41 PST 2006



Changes in directory llvm/include/llvm/Target:

TargetLowering.h updated: 1.51 -> 1.52
---
Log message:

Pass in a value type to getRegForInlineAsmConstraint, allowing targets to
select different sets of registers depending on the type requested.


---
Diffs of the changes:  (+2 -1)

 TargetLowering.h |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/Target/TargetLowering.h
diff -u llvm/include/llvm/Target/TargetLowering.h:1.51 llvm/include/llvm/Target/TargetLowering.h:1.52
--- llvm/include/llvm/Target/TargetLowering.h:1.51	Fri Feb 17 12:06:19 2006
+++ llvm/include/llvm/Target/TargetLowering.h	Tue Feb 21 17:10:29 2006
@@ -496,7 +496,8 @@
   /// satisfy the constraint.  This should only be used for physregs and 
   /// C_RegisterClass constraints.
   virtual std::vector<unsigned> 
-  getRegForInlineAsmConstraint(const std::string &Constraint) const;
+  getRegForInlineAsmConstraint(const std::string &Constraint,
+                               MVT::ValueType VT) const;
   
   /// isOperandValidForConstraint - Return true if the specified SDOperand is
   /// valid for the specified target constraint letter.






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