[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.157 -> 1.158
---
Log message:

If the false case is the current basic block, then this is a self loop.
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out. 

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.


---
Diffs of the changes:  (+0 -11)

 PPCISelDAGToDAG.cpp |   11 -----------
 1 files changed, 11 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.157 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.158
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.157	Thu Feb  9 01:17:49 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Thu Feb 16 02:27:56 2006
@@ -1046,17 +1046,6 @@
     if (N->getOpcode() == ISD::BRTWOWAY_CC) {
       SDOperand CondTrueBlock = N->getOperand(4);
       SDOperand CondFalseBlock = N->getOperand(5);
-      
-      // If the false case is the current basic block, then this is a self loop.
-      // We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an
-      // extra dispatch group to the loop.  Instead, invert the condition and
-      // emit "Loop: ... br!cond Loop; br Out
-      if (cast<BasicBlockSDNode>(CondFalseBlock)->getBasicBlock() == BB) {
-        std::swap(CondTrueBlock, CondFalseBlock);
-        CC = getSetCCInverse(CC,
-                             MVT::isInteger(N->getOperand(2).getValueType()));
-      }
-      
       unsigned Opc = getBCCForSetCC(CC);
       SDOperand CB =
         SDOperand(CurDAG->getTargetNode(PPC::COND_BRANCH, MVT::Other,