[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp AlphaInstrInfo.h AlphaInstrInfo.td

[Andrew Lenharth]

Changes in directory llvm/lib/Target/Alpha:

AlphaInstrInfo.cpp updated: 1.7 -> 1.8
AlphaInstrInfo.h updated: 1.4 -> 1.5
AlphaInstrInfo.td updated: 1.112 -> 1.113
---
Log message:

isStoreToStackSlot

---
Diffs of the changes:  (+20 -3)

 AlphaInstrInfo.cpp |   18 ++++++++++++++++++
 AlphaInstrInfo.h   |    1 +
 AlphaInstrInfo.td  |    4 +---
 3 files changed, 20 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.7 llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.8
--- llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.7	Thu Feb  2 14:12:32 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.cpp	Thu Feb  2 21:07:37 2006
@@ -61,3 +61,21 @@
   return 0;
 }
 
+unsigned 
+AlphaInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const {
+  switch (MI->getOpcode()) {
+  case Alpha::STL:
+  case Alpha::STQ:
+  case Alpha::STB:
+  case Alpha::STW:
+  case Alpha::STS:
+  case Alpha::STT:
+    if (MI->getOperand(1).isFrameIndex()) {
+      FrameIndex = MI->getOperand(1).getFrameIndex();
+      return MI->getOperand(0).getReg();
+    }
+    break;
+  }
+  return 0;
+}
+


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.h
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.h:1.4 llvm/lib/Target/Alpha/AlphaInstrInfo.h:1.5
--- llvm/lib/Target/Alpha/AlphaInstrInfo.h:1.4	Thu Feb  2 14:12:32 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.h	Thu Feb  2 21:07:37 2006
@@ -37,6 +37,7 @@
                            unsigned &SrcReg, unsigned &DstReg) const;
   
   virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
+  virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
 };
 
 }


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.112 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.113
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.112	Wed Feb  1 13:37:33 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Thu Feb  2 21:07:37 2006
@@ -177,9 +177,7 @@
                 [(set GPRC:$RDEST, (select (xor GPRC:$RCOND, 1), GPRC:$RFALSE, immUExt8:$RTRUE))]>;
 
 
-//FIXME: fold setcc with select for all cases.  clearly I need patterns for inverted conditions
-//       and constants (which require inverted conditions as legalize puts the constant in the
-//       wrong field for the instruction definition
+//General pattern for cmov
 def : Pat<(select GPRC:$which, GPRC:$src1, GPRC:$src2),
       (CMOVNE GPRC:$src2, GPRC:$src1, GPRC:$which)>;
 def : Pat<(select GPRC:$which, GPRC:$src1, immUExt8:$src2),