[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8InstrInfo.td updated: 1.111 -> 1.112
---
Log message:

Add immediate forms of integer cmovs


---
Diffs of the changes:  (+49 -6)

 SparcV8InstrInfo.td |   55 ++++++++++++++++++++++++++++++++++++++++++++++------
 1 files changed, 49 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.111 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.112
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.111	Tue Jan 31 00:18:16 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Tue Jan 31 00:24:29 2006
@@ -800,17 +800,22 @@
 
 // V9 Conditional Moves.
 let Predicates = [HasV9], isTwoAddress = 1 in {
+  // Move Integer Register on Condition (MOVcc) p. 194 of the V9 manual.
   // FIXME: Add instruction encodings for the JIT some day.
   class IntCMOVICCrr<string asmstr, ICC_VAL CC>
-    : Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F),
-             asmstr,
+    : Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F), asmstr,
              [(set IntRegs:$dst,
                           (V8selecticc IntRegs:$F, IntRegs:$T, CC, ICC))]> {
     int CondBits = CC.ICCVal;
   }
+  class IntCMOVICCri<string asmstr, ICC_VAL CC>
+    : Pseudo<(ops IntRegs:$dst, IntRegs:$T, i32imm:$F), asmstr,
+             [(set IntRegs:$dst,
+                          (V8selecticc simm11:$F, IntRegs:$T, CC, ICC))]> {
+    int CondBits = CC.ICCVal;
+  }
   
-  
-  // Move Integer Register on Condition (MOVcc) p. 194 of the V9 manual.
+  // MOV*rr instructions.
   def MOVNErr   : IntCMOVICCrr< "movne %icc, $F, $dst", ICC_NE>;
   def MOVErr    : IntCMOVICCrr<  "move %icc, $F, $dst", ICC_E>; 
   def MOVGrr    : IntCMOVICCrr<  "movg %icc, $F, $dst", ICC_G>;
@@ -825,16 +830,38 @@
   def MOVNEGrr  : IntCMOVICCrr<"movneg %icc, $F, $dst", ICC_NEG>;
   def MOVVCrr   : IntCMOVICCrr< "movvc %icc, $F, $dst", ICC_VC>;
   def MOVVSrr   : IntCMOVICCrr< "movvs %icc, $F, $dst", ICC_VS>;
+  
+  // MOV*ri instructions.
+  def MOVNEri   : IntCMOVICCri< "movne %icc, $F, $dst", ICC_NE>;
+  def MOVEri    : IntCMOVICCri<  "move %icc, $F, $dst", ICC_E>; 
+  def MOVGri    : IntCMOVICCri<  "movg %icc, $F, $dst", ICC_G>;
+  def MOVLEri   : IntCMOVICCri< "movle %icc, $F, $dst", ICC_LE>;
+  def MOVGEri   : IntCMOVICCri< "movge %icc, $F, $dst", ICC_GE>;
+  def MOVLri    : IntCMOVICCri<  "movl %icc, $F, $dst", ICC_L>;
+  def MOVGUri   : IntCMOVICCri< "movgu %icc, $F, $dst", ICC_GU>;
+  def MOVLEUri  : IntCMOVICCri<"movleu %icc, $F, $dst", ICC_LEU>;
+  def MOVCCri   : IntCMOVICCri< "movcc %icc, $F, $dst", ICC_CC>;
+  def MOVCSri   : IntCMOVICCri< "movcs %icc, $F, $dst", ICC_CS>;
+  def MOVPOSri  : IntCMOVICCri<"movpos %icc, $F, $dst", ICC_POS>;
+  def MOVNEGri  : IntCMOVICCri<"movneg %icc, $F, $dst", ICC_NEG>;
+  def MOVVCri   : IntCMOVICCri< "movvc %icc, $F, $dst", ICC_VC>;
+  def MOVVSri   : IntCMOVICCri< "movvs %icc, $F, $dst", ICC_VS>;
 
   // FIXME: Allow regalloc of the fcc condition code some day.
   class IntCMOVFCCrr<string asmstr, FCC_VAL CC>
-    : Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F),
-             asmstr,
+    : Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F), asmstr,
              [(set IntRegs:$dst,
                           (V8selectfcc IntRegs:$F, IntRegs:$T, CC, FCC))]> {
     int CondBits = CC.FCCVal;
   }
+  class IntCMOVFCCri<string asmstr, FCC_VAL CC>
+    : Pseudo<(ops IntRegs:$dst, IntRegs:$T, i32imm:$F), asmstr,
+             [(set IntRegs:$dst,
+                          (V8selectfcc simm11:$F, IntRegs:$T, CC, FCC))]> {
+    int CondBits = CC.FCCVal;
+  }
 
+  // MOVF*rr instructions.
   def MOVFUrr   : IntCMOVFCCrr<  "movfu %fcc, $F, $dst", FCC_U>;
   def MOVFGrr   : IntCMOVFCCrr<  "movfg %fcc, $F, $dst", FCC_G>;
   def MOVFUGrr  : IntCMOVFCCrr< "movfug %fcc, $F, $dst", FCC_UG>;
@@ -849,6 +876,22 @@
   def MOVFLErr  : IntCMOVFCCrr< "movfle %fcc, $F, $dst", FCC_LE>;
   def MOVFULErr : IntCMOVFCCrr<"movfule %fcc, $F, $dst", FCC_ULE>;
   def MOVFOrr   : IntCMOVFCCrr<  "movfo %fcc, $F, $dst", FCC_O>;
+  
+   // MOVF*ri instructions.
+  def MOVFUri   : IntCMOVFCCri<  "movfu %fcc, $F, $dst", FCC_U>;
+  def MOVFGri   : IntCMOVFCCri<  "movfg %fcc, $F, $dst", FCC_G>;
+  def MOVFUGri  : IntCMOVFCCri< "movfug %fcc, $F, $dst", FCC_UG>;
+  def MOVFLri   : IntCMOVFCCri<  "movfl %fcc, $F, $dst", FCC_L>;
+  def MOVFULri  : IntCMOVFCCri< "movful %fcc, $F, $dst", FCC_UL>;
+  def MOVFLGri  : IntCMOVFCCri< "movflg %fcc, $F, $dst", FCC_LG>;
+  def MOVFNEri  : IntCMOVFCCri< "movfne %fcc, $F, $dst", FCC_NE>;
+  def MOVFEri   : IntCMOVFCCri<  "movfe %fcc, $F, $dst", FCC_E>;
+  def MOVFUEri  : IntCMOVFCCri< "movfue %fcc, $F, $dst", FCC_UE>;
+  def MOVFGEri  : IntCMOVFCCri< "movfge %fcc, $F, $dst", FCC_GE>;
+  def MOVFUGEri : IntCMOVFCCri<"movfuge %fcc, $F, $dst", FCC_UGE>;
+  def MOVFLEri  : IntCMOVFCCri< "movfle %fcc, $F, $dst", FCC_LE>;
+  def MOVFULEri : IntCMOVFCCri<"movfule %fcc, $F, $dst", FCC_ULE>;
+  def MOVFOri   : IntCMOVFCCri<  "movfo %fcc, $F, $dst", FCC_O>;
 }
 
 // Floating-Point Move Instructions, p. 164 of the V9 manual.