[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.64 -> 1.65
---
Log message:

When lowering SELECT_CC, see if the input is a lowered SETCC.  If so, fold
the two operations together.  This allows us to compile this:

void %two(int %a, int* %b) {
        %tmp.2 = seteq int %a, 0
        %tmp.0.0 = select bool %tmp.2, int 10, int 20
        store int %tmp.0.0, int* %b
        ret void
}

into:

two:
        save -96, %o6, %o6
        or %g0, 20, %l0
        or %g0, 10, %l1
        subcc %i0, 0, %l2
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        st %l1, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

instead of:

two:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        or %g0, 20, %l2
        or %g0, 10, %l3
        subcc %i0, 0, %l4
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        subcc %l1, 0, %l0
        bne .LBBtwo_4   ! entry
        nop
.LBBtwo_3:      ! entry
        or %g0, %l2, %l3
.LBBtwo_4:      ! entry
        st %l3, [%i1]
        restore %g0, %g0, %g0
        retl
        nop



---
Diffs of the changes:  (+18 -0)

 SparcV8ISelDAGToDAG.cpp |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.64 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.65
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.64	Sun Jan 29 22:09:04 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Sun Jan 29 22:34:44 2006
@@ -669,6 +669,24 @@
     SDOperand TrueVal = Op.getOperand(2);
     SDOperand FalseVal = Op.getOperand(3);
     
+    // If this is a select_cc of a "setcc", and if the setcc got lowered into
+    // an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
+    if (isa<ConstantSDNode>(RHS) && cast<ConstantSDNode>(RHS)->getValue() == 0&&
+        CC == ISD::SETNE && 
+        ((LHS.getOpcode() == V8ISD::SELECT_ICC &&
+          LHS.getOperand(3).getOpcode() == V8ISD::CMPICC) ||
+         (LHS.getOpcode() == V8ISD::SELECT_FCC &&
+          LHS.getOperand(3).getOpcode() == V8ISD::CMPFCC)) &&
+        isa<ConstantSDNode>(LHS.getOperand(0)) &&
+        isa<ConstantSDNode>(LHS.getOperand(1)) &&
+        cast<ConstantSDNode>(LHS.getOperand(0))->getValue() == 1 &&
+        cast<ConstantSDNode>(LHS.getOperand(1))->getValue() == 0) {
+      SDOperand CMPCC = LHS.getOperand(3);
+      CC = cast<ConstantSDNode>(LHS.getOperand(2))->getValue();
+      LHS = CMPCC.getOperand(0);
+      RHS = CMPCC.getOperand(1);
+    }
+    
     SDOperand CompareFlag;
     unsigned Opc;
     if (LHS.getValueType() == MVT::i32) {